US2009166884A1PendingUtilityA1

Semiconductor device and method for manufacturing the same

Assignee: BAEK IN CHEOLPriority: Dec 26, 2005Filed: Mar 19, 2009Published: Jul 2, 2009
Est. expiryDec 26, 2025(expired)· nominal 20-yr term from priority
Inventors:In-Cheol Baek
H10P 50/73H10W 20/425H10W 20/42H10W 20/082H10D 64/011
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Claims

Abstract

A semiconductor device and a method for manufacturing the same is provided. The semiconductor device includes a semiconductor substrate having a conductive layer; an interlayer dielectric layer formed on the semiconductor substrate, the interlayer dielectric layer having a hole with a taper angled at the hole's upper portion; a diffusion barrier layer formed on the hole and the interlayer dielectric layer; and a seed layer formed on the diffusion barrier layer.

Claims

exact text as granted — not AI-modified
1 . A semiconductor device comprising:
 a semiconductor substrate having a conductive layer;   an interlayer dielectric layer formed on the semiconductor substrate, wherein the interlayer dielectric layer has a hole above the conductive layer, wherein an upper portion of the hole has a tapered angle;   a diffusion barrier layer formed on the hole and the interlayer dielectric layer; and   a seed layer formed on the di fusion barrier layer.   
   
   
       2 . The semiconductor device of  claim 1 , wherein a lower portion of the hole has a width identical to a width of a middle portion of the hole, and a width of the upper portion of the hole is wider than the width of the lower portion of the hole. 
   
   
       3 . The semiconductor device of  claim 1 , wherein the diffusion barrier layer comprises a single TaN layer. 
   
   
       4 . The semiconductor device of  claim 1 , wherein the diffusion barrier layer comprises a single Ta layer. 
   
   
       5 . The semiconductor device of claim , wherein the diffusion barrier layer comprises a dual TaN/Ta layer. 
   
   
       6 . The semiconductor device of  claim 1 , wherein the upper portion of the hole is sunk at a predetermined angle. 
   
   
       7 . The semiconductor device of  claim 1 , wherein the upper portion of the hole has a width wider than the width of the lower portion of the hole. 
   
   
       8 . The semiconductor device of  claim 1 , wherein the lower portion of the hole has a width identical to a width of a middle portion of the hole.

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