Semiconductor integrated circuits including grating coupler for optical communication and methods of forming the same

Abstract

Provided are semiconductor integrated circuits including a grating coupler for optical communication and methods of forming the same. The semiconductor integrated circuit includes: a cladding layer disposed on a semiconductor substrate; a grating coupler including an optical waveguide on the cladding layer and a grating on the optical waveguide; and at least one reflector formed in the cladding layer below the grating.

1 . A semiconductor integrated circuit comprising:
 a cladding layer disposed on a semiconductor substrate;   a grating coupler including an optical waveguide on the cladding layer and a grating on the optical waveguide; and   at least one reflector formed in the cladding layer below the grating.   
   
   
       2 . The semiconductor integrated circuit of  claim 1 , wherein the reflector comprises a plane form parallel to the top surface of the semiconductor substrate. 
   
   
       3 . The semiconductor integrated circuit of  claim 2 , wherein a plurality of the reflectors are disposed in the cladding layer, the reflectors being sequentially stacked and spaced apart from each other in a direction perpendicular to the top surface of the semiconductor substrate. 
   
   
       4 . The semiconductor integrated circuit of  claim 1 , wherein the reflector comprises a reflective surface non-parallel to the top surface of the semiconductor substrate. 
   
   
       5 . The semiconductor integrated circuit of  claim 1 , wherein the reflector comprises a reflective surface oblique with respect to the top surface of the semiconductor substrate. 
   
   
       6 . The semiconductor integrated circuit of  claim 5 , wherein a plurality of the reflectors are disposed in the cladding layer, the reflectors being arranged along one direction parallel to the top surface of the semiconductor substrate at the same height. 
   
   
       7 . The semiconductor integrated circuit of  claim 5 , wherein the thickness of the reflector increases as a position in the reflector moves laterally from a first sidewall of the reflector toward a second sidewall of the reflector. 
   
   
       8 . The semiconductor integrated circuit of  claim 4 , wherein the reflector comprises a grating shape. 
   
   
       9 . The semiconductor integrated circuit of  claim 1 , wherein the grating comprises a plurality of protrusions spaced apart from each other side by side, each of the protrusions having both sidewalls oblique to the top surface of the semiconductor substrate. 
   
   
       10 . A semiconductor integrated circuit comprising:
 a cladding layer disposed on a semiconductor substrate;   a grating coupler including an optical waveguide on the cladding layer and a grating on the optical waveguide; and   at least one reflector formed in the semiconductor substrate below the grating and including a reflective surface non-parallel to the top surface of the semiconductor substrate.   
   
   
       11 . The semiconductor integrated circuit of  claim 10 , wherein the reflector comprises a reflective surface oblique with respect to the top surface of the semiconductor substrate. 
   
   
       12 . The semiconductor integrated circuit of  claim 11 , wherein a plurality of the reflectors are disposed in the semiconductor substrate, the plurality of reflectors being arranged along one direction at the same height. 
   
   
       13 . The semiconductor integrated circuit of  claim 11 , wherein the thickness of the reflector increases as a position in the reflector moves laterally from a first sidewall of the reflector toward a second sidewall of the reflector. 
   
   
       14 . The semiconductor integrated circuit of  claim 10 , wherein the reflector comprises a grating shape. 
   
   
       15 . The semiconductor integrated circuit of  claim 10 , wherein the grating comprises a plurality of protrusions spaced apart from each other side by side, each of the protrusions having both sidewalls oblique to the top surface of the semiconductor substrate. 
   
   
       16 . The semiconductor integrated circuit of  claim 10 , further comprising a low refractive-index material filling a region where the cladding layer below the grating is removed, the low refractive-index material having a lower refractive-index than the semiconductor substrate. 
   
   
       17 . A method of forming a semiconductor integrated circuit, the method comprising:
 preparing a substrate including a semiconductor substrate, a cladding layer, and a semiconductor layer, which are sequentially stacked;   forming at least one reflector in the substrate using an element ion implantation process; and   patterning the semiconductor layer to form a grating coupler, the grating coupler including an optical waveguide on the cladding layer and a grating on the optical waveguide,   wherein the reflector is formed below the grating.   
   
   
       18 . The method of  claim 17 , wherein the reflector is formed in the cladding layer. 
   
   
       19 . The method of  claim 17 , wherein the reflector is formed in the semiconductor substrate. 
   
   
       20 . The method of  claim 17 , wherein the forming of the reflector further comprises performing an annealing process on the substrate after performing the element ion implantation process. 
   
   
       21 . The method of  claim 17 , wherein the forming of the reflector comprises:
 forming a mask pattern having an opening on the substrate; and   performing an element ion implantation process by using the mask pattern as an ion implantation mask,   wherein the reflector is formed in a plane shape parallel to the top surface of the semiconductor substrate.   
   
   
       22 . The method of  claim 21 , wherein the forming of the reflector comprises sequentially performing a plurality of element ion implantation processes having different implantation energies from each other by using the mask pattern as a mask,
 wherein a plurality of plane-shaped reflectors sequentially stacked are formed in the substrate and are spaced apart from each other in a direction perpendicular to the top surface of the semiconductor substrate.   
   
   
       23 . The method of  claim 17 , wherein the reflector comprises a reflective surface non-parallel with respect to the top surface of the semiconductor substrate. 
   
   
       24 . The method of  claim 23 , wherein the forming of the reflector comprises sequentially performing a plurality of selective element ion implantation processes having different implantation energies from each other to form a plurality of element implantation regions,
 wherein the element implantation regions have the same width, and a virtual line via the centers of the element implantation regions is oblique with respect to the top surface of the semiconductor substrate.   
   
   
       25 . The method of  claim 23 , wherein the forming of the reflector comprises sequentially performing a plurality of selective element ion implantation processes having different implantation energies from each other to form a plurality of element implantation regions being sequentially stacked,
 wherein widths of the stacked element implantation regions are different from each other, the widths of the stacked element implantation regions decrease from the lowermost element implantation region toward the uppermost element implantation region, and one sidewalls of the stacked element implantation regions are aligned to each other.   
   
   
       26 . The method of  claim 23 , wherein the forming of the reflector comprises:
 performing a first element ion implantation process in the substrate to form a first element implantation region being plane-shaped; and   selectively performing a second element ion implantation process in the substrate to form a plurality of second element implantation regions on the first element implantation region,   wherein the second element implantation regions have the less widths than the first element implantation region;   the second element implantation regions contact the first ion implantation layer; and   the second element implantation regions are spaced apart from each other side by side.   
   
   
       27 . The method of  claim 17 , further comprising:
 removing the cladding layer below the grating coupler; and   filing a region where the cladding layer is removed with a low refractive-index material,   wherein the reflector is formed in the semiconductor substrate below the grating coupler.   
   
   
       28 . A method of forming a semiconductor integrated circuit, the method comprising:
 preparing a substrate including a semiconductor substrate, a cladding layer, and a semiconductor layer, which are sequentially stacked;   forming compound patterns on an upper portion of the semiconductor layer using an ion implantation process, the compound patterns being laterally spaced apart from each other and having oblique both sidewalls; and   patterning the semiconductor layer to form a grating coupler, the grating coupler including an optical waveguide on the cladding layer and a grating on the optical waveguide,   wherein a protruding portion of the grating is a portion of the semiconductor layer between the compound patterns.   
   
   
       29 . The method of  claim 28 , wherein the forming of the compound pattern comprises performing a plurality of selective ion implantation processes having respectively different implantation energies to form a plurality of compound element implantation regions,
 wherein the compound element implantation regions have the same width, and a virtual line via the centers of the compound element implantation regions is oblique with respect to the top surface of the semiconductor substrate.   
   
   
       30 . The method of  claim 28 , wherein the forming of the compound pattern further comprises performing an annealing process on the substrate after the ion implantation process. 
   
   
       31 . The method of  claim 28 , further comprising removing the compound patterns. 
   
   
       32 . The method of  claim 28 , further comprising forming at least one reflector in the substrate below the grating using an element ion implantation process. 
   
   
       33 . The method of  claim 32 , wherein the reflector is formed in the cladding layer below the grating. 
   
   
       34 . The method of  claim 32 , wherein the reflector is formed in the semiconductor substrate below the grating.