US2009152671A1PendingUtilityA1

Method for manufacturing simox wafer and simox wafer

Assignee: SUMCO CORPPriority: Jun 13, 2005Filed: Feb 19, 2009Published: Jun 18, 2009
Est. expiryJun 13, 2025(expired)· nominal 20-yr term from priority
H10W 10/181H10P 90/1908H10P 30/209H10P 30/202H10P 30/20H10P 95/90
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Claims

Abstract

This method for manufacturing a SIMOX wafer includes: heating a silicon wafer to 300° C. or more and implanting oxygen ions so as to form a high oxygen concentration layer within the silicon wafer; subjecting the silicon wafer to a cooling to less than 300° C. and an implanting of oxygen ions so as to form an amorphous layer; and subjecting the silicon wafer to a heat-treating in a mixed gas atmosphere containing oxygen so as to form a buried oxide layer. In the forming of the buried oxide layer, a starting temperature is less than 1350° C. and a maximum temperature is 1350° C. or more. This SIMOX wafer is manufactured by the above method and includes a BOX layer and a SOI layer on the BOX layer. The BOX layer has a thickness of 1300 Å or more and a breakdown voltage of 7 MV/cm or more, and the surface of the SOI layer and the interface between the SOI layer and the BOX layer have a roughness over a 10-μm square area of 4 Å rms or less.

Claims

exact text as granted — not AI-modified
1 . A SIMOX wafer, which is manufactured by the method for manufacturing a SIMOX wafer of  claim 1 , the SIMOX wafer comprising: a BOX layer; and a SOI layer on the BOX layer,
 wherein the BOX layer has a thickness of 1300 Å or more and a breakdown voltage of 7 MV/cm or more, and each of the surface of the SOI layer and the interface between the SOI layer and the BOX layer has a roughness over a 10-μm square area of 4 Å rms or less.

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