US2009130801A1PendingUtilityA1

Resin-encapsulated semiconductor device and lead frame, and method for manufacturing the same

Assignee: PANASONIC CORPPriority: Mar 4, 2004Filed: Jan 16, 2009Published: May 21, 2009
Est. expiryMar 4, 2024(expired)· nominal 20-yr term from priority
Y10T156/10H10W 90/756H10W 90/732H10W 90/726H10W 90/722H10W 74/142H10W 74/00H10W 72/5525H10W 72/5363H10W 72/01225H10W 72/952H10W 72/884H10W 72/877H10W 72/552H10W 72/536H10W 72/252H10W 72/0198H10W 72/90H10W 72/072H10W 90/00H10W 74/017H10W 74/016H10W 70/465H10W 70/424H10W 70/411H10W 70/40H10W 44/501H10W 72/9445H10W 74/111
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Claims

Abstract

There are provided a lead frame including a plurality of first external terminal portions 5 provided on a plane, inner lead portions 6 formed of back surfaces of the respective first external terminal portions and arranged so as to surround a region inside the inner lead portions, and second external terminal portions 7 formed of uppermost surfaces of convex portions positioned outside the respective inner lead portions; a semiconductor element 2 flip-chip bonded to the inner lead portions via bumps 3 ; and an encapsulating resin 4 encapsulating surroundings of the semiconductor element and the inner lead portions. The first external terminal portions are arranged in a lower surface region of the encapsulating resin along a periphery of the region, and the second external terminal portions are exposed on an upper surface of the encapsulating resin. A plurality of terminals 8 for electrical connection are provided in a grid pattern in a region inside the first external terminal portions and exposed on a lower surface of the encapsulating resin. A plurality of semiconductor elements or coils and resistors can be incorporated, and further semiconductor devices can be stacked.

Claims

exact text as granted — not AI-modified
1 - 10 . (canceled) 
   
   
       11 . A method for manufacturing a resin-encapsulated semiconductor device, comprising:
 preparing a lead frame having a plurality of first external terminal portions provided on a plane, inner lead portions that are formed on back surfaces of the respective first external terminal portions and arranged at regular intervals so as to surround a region inside the inner lead portions, second external terminal portions formed of uppermost surfaces of convex portions positioned outside the respective inner lead portions, and a plurality of terminals for electrical connection provided in a grid pattern in the region inside the inner lead portions;   forming conductive bumps on electrodes of a first semiconductor element;   connecting the electrodes of the first semiconductor element with predetermined positions of the inner lead portions and the terminals for electrical connection, respectively, via the conductive bumps;   encapsulating the inner lead portions, the first semiconductor element, and the conductive bumps with a resin; and   separating the encapsulated structure from a frame.   
   
   
       12 . The method for manufacturing a resin-encapsulated semiconductor device according to  claim 11 , further comprising:
 preparing a second semiconductor element that is smaller than a region inside inner ends of the inner lead portions and thinner than the inner lead portions of the lead frame;   forming a plurality of electrode pads in a region inside a region for flip-chip bonding via the conductive bumps in the first semiconductor element;   connecting the second semiconductor element to the electrode pads formed in the inside region when the first semiconductor element is in a wafer state; and   dividing the wafer into units of the first semiconductor element;   wherein in the step of connecting the electrodes of the first semiconductor element with predetermined positions of the inner lead portions and the terminals for electrical connection, the first semiconductor element to which the second semiconductor element is connected is supplied.   
   
   
       13 . A method for manufacturing a lead frame including a plurality of first external terminal portions provided on a plane, inner lead portions that are formed on back surfaces of the respective first external terminal portions and arranged at regular intervals so as to surround a region inside the inner lead portions, second external terminal portions formed of uppermost surfaces of convex portions positioned outside the respective inner lead portions, two terminals provided in the region inside the inner lead portions, and a resin with a high dielectric constant sandwiched between the two terminals, comprising:
 preparing a lead frame in which terminals to be independent of each other are connected;   forming a plated layer on the lead frame;   applying a protective sheet to a surface on one side of the lead frame in which the terminals to be independent of each other are connected;   separating the connected terminals to be independent of each other; and   providing a plurality of terminals for electrical connection in the region inside the arranged inner lead portions.   
   
   
       14 . The method for manufacturing a lead frame according to  claim 13 , further comprising:
 providing two terminals for electrical connection, injecting a resin with a high dielectric constant between the two terminals, and curing the resin.   
   
   
       15 . The method for manufacturing a lead frame according to  claim 13 , wherein the inner lead portions are arranged at regular intervals on a periphery of a region in which a semiconductor device is to be mounted, and a resistor with two terminals is provided in the region inside the inner lead portions, each of the two terminals of the resistor having a region to be an upper surface that is sufficiently large so as to allow bump bonding.

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