Semiconductor device including a tcam having a storage element formed with a dram

Abstract

In order to improve the discharging speed of potential from a match line, a semiconductor device includes a capacitor, a memory transistor having a source/drain region connected to a storage node of the capacitor, a search transistor having a gate electrode connected to the storage node, and a stacked contact connecting a match line and the source/drain region of the search transistor. The storage node has a configuration in which a sidewall of the storage node facing the match line partially recedes away from the stacked contact such that a portion of the sidewall in front of the stacked contact in plan view along the direction of the match line is located farther away from the stacked contact than the remaining portion of the sidewall.

1 . A semiconductor device comprising:
 a cell electrically connected to metal lines,   wherein said cell comprises   a capacitor,   a memory transistor having a source/drain region connected to a storage node of said capacitor,   a search transistor having a gate electrode connected to the storage node of said capacitor, and   a contact electrically connecting a match line included among said metal lines with a source/drain region of said search transistor, said match line extending in a first direction,   wherein said storage node comprises a first portion having a first width in said first direction in plan view and a second portion having a second width larger than said first width in said first direction in plan view,   said contact comprises stacked polysilicon, tungsten and copper portions, and   the polysilicon portion, the tungsten portion, and the copper portion are vertically stacked from the source/drain region to reach the match line in this order.   
   
   
       2 - 6 . (canceled) 
   
   
       7 . The semiconductor device according to  claim 1 , wherein said contact is adjacent to said first portion in said first direction. 
   
   
       8 . The semiconductor device according to  claim 1 , wherein said storage node is symmetric about one center line of said storage node extending in a second direction perpendicular to said first direction, and is asymmetric about another center line of said storage node extending in said first direction, in plan view. 
   
   
       9 . The semiconductor device according to  claim 1 , wherein said storage node has opposite sides in a second direction perpendicular to said first direction, and a first side at said first portion side is shorter in length than a second side at said second portion side. 
   
   
       10 . The semiconductor device according to  claim 1 , wherein said storage node is reduced stepwise in width from said second portion towards said first portion.