Methods for the Support of JTAG for Source Synchronous Interfaces

Abstract

Exemplary embodiments of the present invention comprise a method for the support of a JTAG interface for the testing of connectivity between integrated circuits. The method comprises delivering output from a JTAG register to a primary register, delivering a JTAG control signal to the primary register and a clock signal gating control logic, delivering output from the primary register and a secondary register to a multiplexer, delivering clock signal output from the clock signal gating control logic to the multiplexer, wherein the clock signal is delivered is a constant and known value, and delivering the output from the multiplexer to an I/O driver.

1 . A method for the support of a JTAG interface for the testing of connectivity between integrated circuits, the method comprising:
 delivering output from a JTAG register to a primary register;   delivering a JTAG control signal to the primary register and a clock signal gating control logic;   delivering output from the primary register and a secondary register to a multiplexer;   delivering clock signal output from the clock signal gating control logic to the multiplexer, wherein the clock signal is delivered is a constant and known value; and   delivering the output from the multiplexer to an I/O driver.