Process of forming an electronic device including depositing a conductive layer over a seed layer

Abstract

A process of forming an electronic device can include placing a seed layer into an electroplating solution within an electroplating tool. The electroplating tool can include a first electrode and a second electrode, wherein the first electrode is electrically connected to the seed layer. The process can also include depositing a first portion of a conductive layer using a first signal of a first type (e.g., direct current) between the first electrode and a second electrode, and depositing a second portion of the conductive layer over the first portion of the conductive layer, using a second signal of a second type (e.g., alternating current) between the first electrode and the second electrode of the electroplating tool.

1 . A process of forming an electronic device comprising:
 placing a seed layer overlying a substrate into an electroplating solution within an electroplating tool;   depositing a first portion of a conductive layer over the seed layer, wherein depositing the first portion is performed using a first signal of a first type while the substrate is within the electroplating tool; and   depositing a second portion of the conductive layer over the first portion of the conductive layer, wherein depositing the second portion is performed using a second signal of a second type while the substrate is within the electroplating tool, and wherein the second signal type is different from the first signal type.   
     
     
         2 . The process of  claim 1 , further comprising forming the seed layer over the substrate, wherein:
 the substrate includes an electronic component and an insulating layer over the electronic component, wherein the insulating layer includes an opening extending therethrough; and   forming the seed layer comprises depositing the seed layer over the insulating layer and within the opening, such that the seed layer is electrically connected to the electronic component, and only a portion of the opening is filled with the seed layer.   
     
     
         3 . The process of  claim 2 , further comprising forming a barrier layer before forming the seed layer, wherein after forming the seed layer, a width of the opening in the insulating layer is no greater than approximately  20  times the combined thickness of the barrier layer and the seed layer, as measured over the insulating layer. 
     
     
         4 . The process of  claim 1 , wherein the first signal type is direct current, and the second signal type is alternating current. 
     
     
         5 . The process of  claim 4 , wherein during depositing the first portion of the conductive layer, the current flow is not greater than approximately 14 milliamps per square centimeter of substrate area from a top view of the substrate. 
     
     
         6 . The process of  claim 1 , wherein placing the seed layer overlying the substrate into the electroplating solution comprises lowering the seed layer and the substrate into the electroplating solution such that the substrate is a range of approximately 7 mm to approximately 9 mm below a meniscus of the electroplating solution. 
     
     
         7 . The process of  claim 1 , further comprising:
 electrically connecting to the seed layer to a first electrode of the electroplating tool that is spaced apart from a second electrode of the electroplating tool; and   applying a potential difference between the first electrode and the second electrode before placing the seed layer into the electroplating solution, wherein the potential difference is not greater than approximately 4 volts.   
     
     
         8 . The process of  claim 1 , wherein:
 the process further comprises electrically connecting to the seed layer to a first electrode of the electroplating tool that is spaced apart from a second electrode of the electroplating tool; and   depositing the first portion of the conductive layer ends after not greater than approximately 0.07 coulombs per square centimeter of substrate area, as seen from a top view of the substrate, flows between the first electrode and the second electrode.   
     
     
         9 . The process of  claim 1 , wherein the electroplating solution includes a disulfide compound, a polyethylene glycol compound, and substantially no amine compound. 
     
     
         10 . The process of  claim 1 , further comprising electrically connecting to the seed layer to a first electrode of the electroplating tool that is spaced apart from a second electrode of the electroplating tool, wherein the second electrode includes a plurality of second anodes, and each anode of the plurality of second anodes is independently controlled from each other. 
     
     
         11 . A process of forming electronic device comprising:
 electrically connecting a first electrode of an electroplating tool and a seed layer overlying a semiconductor substrate to each other;   applying a potential difference as a direct current signal between the first electrode and a second electrode of the electroplating tool, wherein the second electrode is spaced apart from the first electrode and the seed layer, is disposed within an electroplating solution of the electroplating tool, and the electroplating solution includes substantially no amine;   placing the seed layer into an electroplating solution after applying the potential difference between the first electrode and the second electrode;   depositing a first portion of a conductive layer over the seed layer, wherein depositing the first portion ends after not greater than approximately 0.07 coulombs per square centimeter of substrate area, from a top view of the substrate, flows from the first electrode to the second electrode; and   depositing a second portion of the conductive layer over the first portion of the conductive layer, wherein depositing the second portion is performed using an alternating current signal between the first electrode and the second electrode.   
     
     
         12 . The process of  claim 11 , further comprising:
 forming an insulating layer over the substrate;   forming an opening in the insulating layer to expose a conductive structure, wherein the opening has an aspect ratio greater than one; and   forming the seed layer over the insulating layer and within the opening of the insulating layer before electrically connecting the first electrode of the electroplating tool and the seed layer.   
     
     
         13 . The process of  claim 12 , further including forming a barrier layer over the conductive structure before forming the seed layer. 
     
     
         14 . The process of  claim 12 , wherein the opening in the insulating layer has a width no greater than approximately 130 nm. 
     
     
         15 . The process of  claim 11 , wherein placing the seed layer in contact with the electroplating solution is performed such that the electroplating solution includes a suppressor and an accelerator. 
     
     
         16 . The process of  claim 15 , wherein the suppressor includes a polyethylene glycol compound, and the accelerator includes a disulfide compound. 
     
     
         17 . The process of  claim 11 , wherein applying the potential difference is performed such that the voltage difference of no greater than approximately 4 volts. 
     
     
         18 . The process of  claim 11 , further comprising increasing a current flowing between the first electrode and the second electrode during placing the seed layer into the electroplating solution, during depositing a first portion of a conductive layer over the seed layer, or both. 
     
     
         19 . The process of  claim 11 , wherein the semiconductor substrate includes an electronic component and, after depositing the first and the second portions of the conductive layer, the conductive layer is electrically coupled to the electronic component. 
     
     
         20 . The process of  claim 11 , wherein placing the seed layer into an electroplating solution comprises submerging the semiconductor substrate into the electroplating solution, such that the semiconductor substrate is approximately 7 mm to approximately 9 mm below a meniscus of the electroplating solution.