US2009109139A1PendingUtilityA1

Plasma display panel device

Assignee: KONDO NOBUYOSHIPriority: Oct 29, 2007Filed: Aug 25, 2008Published: Apr 30, 2009
Est. expiryOct 29, 2027(~1.2 yrs left)· nominal 20-yr term from priority
G09G 3/294G09G 3/2927G09G 3/296G09G 2310/066
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Claims

Abstract

A PDP device can realize both the reduction in power consumption in the sustain period and the appropriate erase operation. The PDP device has a plurality of display electrodes on a substrate surface, wherein the display electrodes include mutually adjacent X electrodes and Y electrodes. And the PDP has X, Y drive circuits that drive the X, Y electrodes. Further, in a sustain period, the X, Y electrode drive circuits apply sustain pulses having a rising dull waveform during the rise and a falling dull waveform during the fall between the X, Y electrodes a plurality of times, and after the plurality of sustain pulses have been applied, apply narrow erase pulses having a rise characteristic sharper than the rising dull waveform during the rise and also having a pulse width shorter than that of the sustain pulses between the X, Y electrodes.

Claims

exact text as granted — not AI-modified
1 . A plasma display panel device having a plurality of display electrodes on a substrate surface, the display electrodes including first electrodes and second electrodes adjacent to each other, comprising:
 drive circuits that drive the first electrodes and second electrodes, wherein   in a sustain period, the drive circuits apply sustain pulses having a rising dull waveform during the rise and a falling dull waveform during the fall between the first and second electrodes a plurality of times, and after the plurality of sustain pulses have been applied, apply narrow erase pulses having a rise characteristic sharper than the rising dull waveform during the rise and also having a pulse width shorter than that of the sustain pulses between the first and second electrodes.   
   
   
       2 . The plasma display panel device according to  claim 1 , wherein the narrow erase pulse has the falling dull waveform during the fall. 
   
   
       3 . The plasma display panel device according to  claim 1 , wherein the drive circuits each have a power recovery circuit comprising an LC resonance circuit, and a clamp circuit that applies a clamp voltage between the first and second electrodes, and
 the drive circuits apply a rising dull waveform voltage with operating the power recovery circuit between the first and second electrodes, then apply the clamp voltage with operating the clamp circuit during the rise of the sustain pulse; apply a falling dull waveform voltage with operating the power recovery circuit, then remove the clamp voltage of the clamp circuit during the fall; and apply the clamp voltage with operating the clamp circuit without operating the power recovery circuit during the rise of the narrow erase pulse.   
   
   
       4 . The plasma display panel device according to  claim 3 , wherein the drive circuits apply the falling dull waveform voltage with operating the power recovery circuit and then remove the clamp voltage of the clamp circuit during the fall of the narrow erase pulse. 
   
   
       5 . A plasma display panel device having a plurality of display electrodes on a substrate surface, the display electrodes including first electrodes and second electrodes adjacent to each other, comprising:
 a first electrode drive circuit that drives the first electrodes; and   a second electrode drive circuit that drives the second electrodes, wherein   in a sustain period, the first and second electrode drive circuits alternately apply sustain pulses having a rising dull waveform during the rise and a falling dull waveform during the fall to the first and second electrodes, and   after the sustain pulses have been applied to the second electrodes, the first electrode drive circuit applies, to the first electrodes, narrow erase pulses having a rise characteristic sharper than the rising dull waveform during the rise and also having a pulse width shorter than that of the sustain pulses.   
   
   
       6 . The plasma display panel device according to  claim 5 , wherein the first and second electrode drive circuits each have a power recovery circuit comprising an LC resonance circuit, and a clamp circuit that applies a clamp voltage to the first and second electrodes,
 the first and second electrode drive circuits apply a rising dull waveform voltage with operating the power recovery circuit, then apply the clamp voltage with operating the clamp circuit during the rise of the sustain pulses applied alternately to the first and second electrodes; and apply a falling dull waveform voltage with operating the power recovery, and then remove the clamp voltage of the clamp circuit during the fall, and   the first electrode drive circuit applies the clamp voltage with operating the clamp circuit during the rise of the narrow erase pulse without operating the power recovery circuit.   
   
   
       7 . The plasma display panel device according to  claim 6 , wherein the first electrode drive circuit applies the falling dull waveform voltage with operating the power recovery circuit and then removes the clamp voltage of the clamp circuit during the fall of the narrow erase pulse. 
   
   
       8 . A plasma display panel device having a plurality of display electrodes on a substrate surface, the display electrodes including first electrodes and second electrodes adjacent to each other, comprising:
 a first electrode drive circuit that drives the first electrodes; and   a second electrode drive circuit that drives the second electrodes, wherein   in a sustain period, the first and second electrode drive circuits alternately apply sustain pulses having a rising dull waveform during the rise and a falling dull waveform during the fall to the first and second electrodes, and   after the sustain pulses have been applied to the second electrodes, the first electrode drive circuit applies a first erase pulse having a rise characteristic sharper than the rising dull waveform to the first electrodes at a first time, and the second electrode drive circuit applies a second erase pulse of the same polarity as the first erase pulse to the second electrodes at a second time after a time shorter than a pulse width of the sustain pulse has elapsed from the first time.   
   
   
       9 . The plasma display panel device according to  claim 8 , wherein the first erase pulse has the falling dull waveform at a third time after the second time, and
 the second erase pulse has the falling dull waveform at the third time.   
   
   
       10 . The plasma display panel device according to  claim 8 , wherein the second erase pulse has the rising dull waveform at the second time.

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