Semiconductor device

Abstract

The present invention can supply power for each circuit section by separating and connecting bus-bar ( 21 d ) for each circuit section inside the semiconductor chip ( 22 ), and, in addition, can increase the number of pads ( 22 a ) for power supply or can use the lead ( 21 a ) conventionally used for power supply for signals by further making the best of the characteristics that enable the connection to bus-bar ( 21 d ) irrespective of the inner lead ( 21 b ) pitch, by making the pitch of the pad ( 22 a ) smaller than the pitch of the inner lead ( 21 b ), or by forming the pad ( 22 a ) in a zigzag arrangement.

1 - 51 . (canceled) 
     
     
         52 . A semiconductor device comprising:
 a first circuit section including a first transistor which has a current path between a first potential and a second potential;   a second circuit section including a second transistor which has a current path between a third potential a fourth potential;   a first pad that supplies the first potential to the first circuit section;   a second pad that supplies the second potential to the first circuit section;   a third pad that supplies the third potential to the second circuit section;   a fourth pad that supplies the fourth potential to the second circuit section;   a first bus-bar extending substantially parallel to an arrangement direction of the first and second pads, the first bus-bar being arranged between a plurality of inner leads and the first and second pads, and being connected to the first pad by a first wire and supplied with the first potential;   a second bus-bar extending substantially parallel to the arrangement direction of the first and second pads, the second bus-bar being arranged between a plurality of inner leads and the first and second pads, and being connected to the second pad by a second wire and supplied with the second potential;   a third bus-bar extending substantially parallel to an arrangement direction of the third and fourth pads, the third bus-bar being arranged between a plurality of inner leads and the third and fourth pads, and being connected to the third pad by a third wire and supplied with the third potential; and   a fourth bus-bar extending substantially parallel to an arrangement direction of the third and fourth pads, the fourth bus-bar being arranged between a plurality of inner leads and the third and fourth pads, and being connected to the fourth pad by a fourth wire and supplied with the fourth potential.   
     
     
         53 . The semiconductor device according to  claim 52 , wherein the first bus-bar is supplied with the first potential from a first inner lead, and the third bus-bar is supplied with the third potential from a third inner lead. 
     
     
         54 . The semiconductor device according to  claim 53 , wherein the second bus-bar is supplied with the second potential from a second inner lead, and the fourth bus-bar is supplied with the fourth potential from a fourth inner lead. 
     
     
         55 . The semiconductor device according to  claim 54 , wherein the second bus-bar is connected to the second inner lead by a wire, and the fourth bus-bar is connected to the fourth inner lead by a wire. 
     
     
         56 . The semiconductor device according to  claim 52 , further comprising:
 a fifth pad for supplying a fifth potential to the first circuit section; and   a fifth bus-bar extending substantially parallel to the first and second bus-bars, the fifth bus-bar being arranged between a plurality of inner leads and the fifth pad, and being connected to the fifth pad by a fifth wire and supplied with the fifth potential.   
     
     
         57 . The semiconductor device according to  claim 56 , further comprising:
 a sixth pad for supplying a sixth potential to the second circuit section; and   a sixth bus-bar extending substantially parallel to the third and fourth bus-bars, the sixth bus-bar being arranged between a plurality of inner leads and the sixth pad, and being connected to the sixth pad by a sixth wire and supplied with the sixth potential.   
     
     
         58 . The semiconductor device according to  claim 57 , wherein the fifth bus-bar is connected by a wire to a fifth inner lead supplied with the fifth potential, and the sixth bus-bar is connected by a wire to a sixth inner lead supplied with the sixth potential. 
     
     
         59 . The semiconductor device according to  claim 52 , wherein the first circuit section is a digital circuit section and the second circuit section is an analog circuit section. 
     
     
         60 . The semiconductor device according to  claim 52 , comprising a plurality of each of the first and fourth pads. 
     
     
         61 . The semiconductor device according to  claim 52 , wherein a semiconductor chip having the first and second circuit sections and the first to fourth pads, the pluralities of inner leads, the first to fourth bus-bars, and the first to fourth wires are encapsulated by resin. 
     
     
         62 . The semiconductor device according to  claim 52 , wherein the second circuit section is arranged further away from the first and the second bus-bars than the first circuit section. 
     
     
         63 . The semiconductor device according to  claim 52 , wherein the second circuit section is connected to the third pad by a wire, and is arranged further away from the first and the second bus-bars than the first circuit section.