Method of manufacturing a sonos device

Abstract

A SONOS device and a method of manufacturing the same is provided. A tunnel dielectric layer, a charge trap layer, and a charge blocking layer are formed on a semiconductor substrate, and the charge blocking layer is formed on the charge trap layer such that the charge blocking layer is relatively thicker at regions adjacent to or overlapping the source and the drain and relatively thinner at a region overlapping the channel region. A gate is then formed on the blocking layer.

1 . A SONOS device, comprising:
 a semiconductor substrate;   a source and a drain formed with a channel therebetween on the semiconductor substrate;   a tunnel dielectric layer formed on the semiconductor substrate;   a charge trap layer formed on the tunnel dielectric layer;   a charge blocking layer formed on the charge trap layer such that the charge blocking layer is relatively thicker at regions adjacent to or overlapping the source and the drain and relatively thinner at a region overlapping the channel between the relatively thicker regions; and   a gate formed on the charge blocking layer.   
   
   
       2 . The SONOS device of  claim 1 , wherein:
 the tunnel dielectric layer comprises a silicon oxide layer;   the charge trap layer comprises a silicon nitride layer; and   the charge blocking layer comprises a silicon oxide layer.   
   
   
       3 - 8 . (canceled) 
   
   
       9 . The SONOS device of  claim 1 , wherein:
 the tunnel dielectric layer includes an oxide layer by a deposition method or by oxidation of the silicon substrate.   
   
   
       10 . The SONOS device of  claim 1 , wherein:
 the semiconductor substrate includes p-well or n-well.   
   
   
       11 . The SONOS device of  claim 1 , wherein:
 the tunnel dielectric layer is formed of thickness of 20 Ř100 Å.   
   
   
       12 . The SONOS device of  claim 1 , wherein:
 the charge trap layer includes a silicon nitride layer.   
   
   
       13 . The SONOS device of  claim 1 , wherein:
 the charge blocking layer includes a silicon oxide layer.   
   
   
       14 . The SONOS device of  claim 1 , wherein:
 the source and drain are formed to overlap a part of the terminal of the gate electrode.