Data storage systems

Abstract

Method and apparatus for decoding data in a data storage system. In operation, a detector generates an output bit stream in dependence on a data block received from a storage subsystem of the data storage system. A post processor connected to the detector generates a first error corrected bit stream in dependence on the output bit stream and the data block. An error correction decoder connected to the post processor generates a second error corrected bit stream in dependence on the first error corrected bit stream and also generates a checksum in dependence of the second error corrected bit stream. A feedback path supplies from the error correction decoder to the post processor pinning data indicative of locations of correct bits in the second error corrected bit stream in the event that the checksum is indicative of errors in the second error corrected bit stream and the second error corrected bit stream comprises at least one correct interleave. The post processor regenerates the first error corrected bit stream in dependence on the pinning data received from the error correction decoder.

1 . A method for decoding data in a data storage system, the method comprising: generating by a detector an output bit stream in dependence on a data block received from a storage subsystem of the data storage system; generating by a post processor connected to the detector a first error corrected bit stream in dependence on the output bit stream and the data block; generating by an error correction decoder connected to the post processor a second error corrected bit stream in dependence on the first error corrected bit stream; generating by the error correction decoder a checksum in dependence of the second error corrected bit stream; and, in the event that the checksum is indicative of errors in the second error corrected bit stream and the second error corrected bit stream comprises at least one correct interleave: supplying from the error correction decoder to the post processor pinning data indicative of locations of correct bits in the second error corrected bit stream; and, regenerating by the post processor the first error corrected bit stream in dependence on the pinning data. 
   
   
       2 . A method as claimed in  claim 1 , wherein the regenerating comprises discounting bits at the locations indicated by the pinning data. 
   
   
       3 . A method as claimed in  claim 1 , wherein the pinning data is indicative of locations and values of correct bits in the second error corrected bit stream. 
   
   
       4 . A method as claimed in  claim 3 , further comprising supplying the pinning data from the error correction decoder to the detector in the event that the checksum is indicative of errors in the second error corrected bit stream and the second error corrected bit stream comprises at least one correct interleave. 
   
   
       5 . A method as claimed in  claim 4 , further comprising regenerating by the detector the output bit stream in dependence on the pinning data. 
   
   
       6 . A method as claimed in  claim 1 , comprising, in the error correction decoder, performing erasure decoding to generate a third error corrected bit stream in the event that the checksum is indicative of an error in the second error corrected bit stream; and, regenerating the checksum in dependence of the third error corrected bit stream. 
   
   
       7 . A method as claimed in  claim 1 , comprising, in the error correction decoder, performing erasure decoding to generate a third error corrected bit stream in the event that the checksum is indicative of an error in the second error corrected bit stream and the second error corrected bit stream comprises at least one correct interleave; and, regenerating the checksum in dependence of the third error corrected bit stream. 
   
   
       8 . A method as claimed in  claim 7 , comprising signaling a hard error in the event that the regenerated checksum is indicative of error in the third error corrected bit stream. 
   
   
       9 . Apparatus for decoding data in a data storage system, the apparatus comprising: a detector for generating an output bit stream in dependence on a data block received from a storage subsystem of the data storage system; a post processor connected to the detector for generating a first error corrected bit stream in dependence on the output bit stream and the data block; an error correction decoder connected to the post processor for generating a second error corrected bit stream in dependence on the first error corrected bit stream and, for generating a checksum in dependence of the second error corrected bit stream; and, a feedback path for supplying from the error correction decoder to the post processor pinning data indicative of locations of correct bits in the second error corrected bit stream in the event that the checksum is indicative of errors in the second error corrected bit stream and the second error corrected bit stream comprises at least one correct interleave, the post processor regenerating the first error corrected bit stream in dependence on the pinning data received from the error correction decoder. 
   
   
       10 . Apparatus as claimed in  claim 9 , wherein the post processor regenerates the first error corrected bit stream by discounting bits at the locations indicated by the pinning data. 
   
   
       11 . Apparatus as claimed in  claim 9 , wherein the pinning data is indicative of locations and values of correct bits in the second error corrected bit stream. 
   
   
       12 . Apparatus as claimed in  claim 11 , wherein the feedback path further extends to from the error correction decoder to the detector for supplying the pinning data from the error correction decoder to the detector in the event that the checksum is indicative of errors in the second error corrected bit stream and the second error corrected bit stream comprises at least one correct interleave. 
   
   
       13 . Apparatus as claimed in  claim 12 , wherein the detector regenerates the output bit stream in dependence on the pinning data. 
   
   
       14 . Apparatus as claimed in  claim 13 , wherein the post processor regenerates the first error corrected bit steam is performed in dependence on the pinning data and the regenerated output stream. 
   
   
       15 . Apparatus as claimed in  claim 9 , wherein the error correction decoder performs erasure decoding to generate a third error corrected bit stream in the event that the checksum is indicative of an error in the second error corrected bit stream and regenerates the checksum in dependence of the third error corrected bit stream. 
   
   
       16 . Apparatus as claimed in  claim 9 , wherein the error correction decoder performs erasure decoding to generate a third error corrected bit stream in the event that the checksum is indicative of an error in the second error corrected bit stream and the second error corrected bit stream comprises at least one correct interleave, and regenerates the checksum in dependence of the third error corrected bit stream. 
   
   
       17 . Apparatus as claimed in  claim 15 , wherein the error correction decoder signals a hard error in the event that the regenerated checksum is indicative of error in the third error corrected bit stream. 
   
   
       18 . Apparatus as claimed in  claim 9 , further comprising: a modulation decoder having an input connected to the output of the post processor and an output connected to the input of the error correction decoder; and a modulation encoder in the feedback path between the error correction decoder and the post processor. 
   
   
       19 . A data storage system comprising an encoder subsystem for encoding data block for storage; a storage subsystem connected to the encoder subsystem for writing the encoded data blocks on a data storage medium and for reading the encoded data blocks from the data storage medium; and, a decoding subsystem comprising apparatus as claimed in  claim 9  for decoding the encoded data blocks.