US2009073325A1PendingUtilityA1

Semiconductor device and method for manufacturing the same, and electric device

Assignee: SEMICONDUCTOR ENERGY LABPriority: Jan 21, 2005Filed: Nov 11, 2008Published: Mar 19, 2009
Est. expiryJan 21, 2025(expired)· nominal 20-yr term from priority
H10P 14/46H10W 70/699H10W 20/089H10W 20/081H10W 20/056H10W 20/031H10W 20/42H10D 86/441H10D 86/0241H10D 86/0229H10D 86/60H10D 30/6729G02F 1/136227
58
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Claims

Abstract

It is an object of the present invention to simplify steps needed to process a wiring in forming a multilayer wiring. In addition, when a droplet discharging technique or a nanoimprint technique is used to form a wiring in a contact hole having a comparatively long diameter, the wiring in accordance with the shape of the contact hole is formed, and the wiring portion of the contact hole is likely to have a depression compared with other portions. A penetrating opening is formed by irradiating a light-transmitting insulating film with laser light having high intensity and a pulse high in repetition frequency. A plurality of openings having a minute contact area is provided instead of forming one penetrating opening having a large contact area to have an even thickness of a wiring by reducing a partial depression and also to ensure contact resistance.

Claims

exact text as granted — not AI-modified
1 . A active matrix display device comprising:
 a thin film transistor formed over a substrate, the thin film transistor comprising a semiconductor layer wherein the semiconductor layer comprises a metal oxide including at least indium; and   a pixel electrode formed over the substrate and electrically connected to the thin film transistor.   
   
   
       2 . The active matrix display device according to  claim 1 , wherein the metal oxide includes zinc, gallium, and indium. 
   
   
       3 . The active matrix display device according to  claim 1 , wherein the thin film transistor is a bottom gate thin film transistor. 
   
   
       4 . The active matrix display device according to  claim 1 , wherein the thin film transistor is a top gate thin film transistor. 
   
   
       5 . The active matrix display device according to  claim 1 , wherein the active matrix display device is a liquid crystal display device. 
   
   
       6 . The active matrix display device according to  claim 1 , wherein the active matrix display device is an EL display device. 
   
   
       7 . The active matrix display device according to  claim 1 , wherein the substrate is a plastic substrate. 
   
   
       8 . The active matrix display device according to  claim 1 , further comprising an interlayer insulating film formed over the thin film transistor wherein the pixel electrode is electrically connected to the thin film transistor though a plurality of openings formed in the interlayer insulating film. 
   
   
       9 . An active matrix display device comprising:
 a thin film transistor formed over a substrate; and   a pixel electrode formed over the substrate and electrically connected to the thin film transistor,   the thin film transistor including:
 at least two gate electrodes electrically connected to each other; 
 a gate insulating film formed over at least the two gate electrodes; and 
 a semiconductor layer formed over the gate insulating film so as to overlap the two gate electrodes wherein the semiconductor layer comprises a metal oxide including at least indium. 
   
   
   
       10 . The active matrix display device according to  claim 9 , wherein the metal oxide includes zinc, gallium, and indium. 
   
   
       11 . The active matrix display device according to  claim 9 , further comprising a wiring over the semiconductor layer wherein the pixel electrode is connected to the wiring. 
   
   
       12 . The active matrix display device according to  claim 9 , wherein the thin film transistor is a top gate thin film transistor. 
   
   
       13 . The active matrix display device according to  claim 9 , wherein the active matrix display device is a liquid crystal display device. 
   
   
       14 . The active matrix display device according to  claim 9 , wherein the active matrix display device is an EL display device. 
   
   
       15 . The active matrix display device according to  claim 9 , wherein the substrate is a plastic substrate. 
   
   
       16 . The active matrix display device according to  claim 9 , further comprising an interlayer insulating film formed over the thin film transistor wherein the pixel electrode is electrically connected to the thin film transistor through a plurality of openings formed in the interlayer insulating film. 
   
   
       17 . A television device comprising:
 a tuner for receiving a video signal;   a video signal processing circuit operationally connected to the tuner; and   an active matrix display device operationally connected to the video signal processing circuit, the active matrix display device comprising:
 a thin film transistor formed over a substrate, the thin film transistor comprising a semiconductor layer wherein the semiconductor layer comprises a metal oxide including at least indium; and 
 a pixel electrode formed over the substrate and electrically connected to the thin film transistor. 
   
   
   
       18 . The television device according to  claim 17 , wherein the metal oxide includes zinc, gallium, and indium. 
   
   
       19 . The television device according to  claim 17 , wherein the thin film transistor is a bottom gate thin film transistor. 
   
   
       20 . The television device according to  claim 17 , wherein the thin film transistor is a top gate thin film transistor. 
   
   
       21 . The television device according to  claim 17 , wherein the active matrix display device is a liquid crystal display device. 
   
   
       22 . The television device according to  claim 17 , wherein the active matrix display device is an EL display device. 
   
   
       23 . The television device according to  claim 17 , wherein the substrate is a plastic substrate. 
   
   
       24 . The television device according to  claim 17 , further comprising an interlayer insulating film formed over the thin film transistor wherein the pixel electrode is electrically connected to the thin film transistor though a plurality of openings formed in the interlayer insulating film. 
   
   
       25 . A television device comprising:
 a tuner for receiving a video signal;   a video signal processing circuit operationally connected to the tuner; and   an active matrix display device operationally connected to the video signal processing circuit, the active matrix display device comprising:
 a thin film transistor formed over a substrate, and 
 a pixel electrode formed over the substrate and electrically connected to the thin film transistor, 
   the thin film transistor including:
 at least two gate electrodes electrically connected to each other; 
 a gate insulating film formed over at least the two gate electrodes; and 
 a semiconductor layer formed over the gate insulating film so as to overlap the two gate electrodes wherein the semiconductor layer comprises a metal oxide including at least indium. 
   
   
   
       26 . The television device according to  claim 25 , wherein the metal oxide includes zinc, gallium, and indium. 
   
   
       27 . The television device according to  claim 25 , further comprising a wiring over the semiconductor layer wherein the pixel electrode is connected to the wiring. 
   
   
       28 . The television device according to  claim 25 , wherein the thin film transistor is a top gate thin film transistor. 
   
   
       29 . The television device according to  claim 25 , wherein the active matrix display device is a liquid crystal display device. 
   
   
       30 . The television device according to  claim 25 , wherein the active matrix display device is an EL display device. 
   
   
       31 . The television device according to  claim 25 , wherein the substrate is a plastic substrate. 
   
   
       32 . The television device according to  claim 25 , further comprising an interlayer insulating film formed over the thin film transistor wherein the pixel electrode is electrically connected to the thin film transistor through a plurality of openings formed in the interlayer insulating film. 
   
   
       33 . A active matrix display device comprising:
 a bottom gate type thin film transistor formed over a substrate, the bottom gate type thin film transistor comprising a semiconductor layer wherein the semiconductor layer comprises a metal oxide including zinc, gallium, and indium; and   a pixel electrode formed over the substrate and electrically connected to the thin film transistor.   
   
   
       34 . The active matrix display device according to  claim 33 , wherein the active matrix display device is a liquid crystal display device. 
   
   
       35 . The active matrix display device according to  claim 33 , wherein the active matrix display device is an EL display device. 
   
   
       36 . The active matrix display device according to  claim 33 , wherein the substrate is a plastic substrate. 
   
   
       37 . A active matrix display device comprising:
 a thin film transistor formed over a substrate, the thin film transistor comprising a semiconductor layer wherein the semiconductor layer comprises a metal oxide including at least indium;   a pixel electrode formed over the substrate and electrically connected to the thin film transistor; and   a driver circuit comprising an IC chip operationally connected to the thin film transistor.   
   
   
       38 . The active matrix display device according to  claim 37 , wherein the metal oxide includes zinc, gallium, and indium. 
   
   
       39 . The active matrix display device according to  claim 37 , wherein the active matrix display device is a liquid crystal display device. 
   
   
       40 . The active matrix display device according to  claim 37 , wherein the active matrix display device is an EL display device. 
   
   
       41 . The active matrix display device according to  claim 37 , wherein the substrate is a plastic substrate. 
   
   
       42 . The active matrix display device according to  claim 37 , wherein the IC chip is mounted on the substrate. 
   
   
       43 . The active matrix display device according to  claim 37 , wherein the driver circuit is a scanning-line driver circuit. 
   
   
       44 . The active matrix display device according to  claim 37 , wherein the driver circuit is a signal-line driver circuit.

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