Semiconductor device having high voltage mos transistor and fabrication method thereof

Abstract

A semiconductor device having a high voltage MOS transistor. The device includes a gate oxide layer disposed between a gate electrode and a substrate on an active area and having relatively thick portions at edges thereof. A fabrication method includes forming on the substrate is a nitride layer having an opening in a high voltage region. An oxide layer is deposited over the substrate and anisotropically etched to remain only on sidewalls of the opening. A first gate oxide layer is formed on the substrate in the opening, and the nitride layer is removed. Then a second gate oxide layer is formed over the substrate such that the second gate oxide layer has a relatively thinner thickness than the first gate oxide layer. Gate electrodes are then formed in the high voltage region and the low voltage region.

1 - 3 . (canceled) 
   
   
       4 . A semiconductor device comprising:
 a semiconductor substrate having a field area defining an active area;   a gate electrode disposed on the active area of the substrate;   a gate oxide layer disposed between the gate electrode and the substrate on the active area, having relatively thick portions at edges thereof; and   a source/drain formed around the gate electrode in the active area of the substrate.   
   
   
       5 . The device of  claim 4 , further comprising:
 a drift area formed in the substrate to surround the source/drain.   
   
   
       6 . The device of  claim 4 , wherein the gate oxide layer has a thickness of 500˜1500 Å.