Method for fabricating semiconductor device
Abstract
A semiconductor device provided with: a channel region formed in a surface of a semiconductor substrate in a predetermined depth range, a trench being formed in the surface as penetrating the channel region in a depthwise direction; a gate insulating film formed on an inside wall of the trench, the gate insulating film being in contact with the channel region; and a gate electrode including: a polysilicon layer opposing the channel region with the gate insulating film interposed therebetween, the polysilicon layer being embedded in an internal space of the trench at least in the predetermined depth range; and a low-resistance layer essentially formed from a metal element and disposed in the trench above the polysilicon layer that opposes the channel region.
Claims
exact text as granted — not AI-modified1 . A method for fabricating a semiconductor device, comprising the steps of:
forming a trench in a surface of a semiconductor substrate to be formed with a channel region in a predetermined depth range, the trench having a sufficient depth for penetrating through the channel region and being formed in a region permitting the trench to penetrate through the channel region; forming, on an inside wall of the trench, a gate insulating film to be in contact with the channel region; forming a polysilicon layer embedded in the trench so as to fill in a space of the predetermined depth range; and forming a low-resistance layer essentially from a metal element. after the step of forming the polysilicon layer, the low-resistance layer being disposed in the trench above the polysilicon layer and constituting a gate electrode jointly with the polysilicon layer.
2 . A method for fabricating a semiconductor device, according to claim 1 , further comprising a step of forming a barrier metal layer, performed after the step of forming the polysilicon layer and prior to the step of forming the low-resistance layer, the barrier metal layer being to be interposed between the polysilicon layer and the low-resistance layer for retarding the metal atoms diffusion from the low-resistance layer into the polysilicon layer.
3 . A method for fabricating a semiconductor device, according to claim 1 , wherein the step of forming the low-resistance layer includes a step of disposing the low-resistance layer within the trench partially,
the method further comprising the steps of: filling a cavity formed at an upper area in the trench by the step of disposing the low-resistance layer within the trench partially with an insulating layer; and etching back the insulating layer until a top surface of the insulating layer is positioned in the trench, the etching back step being performed after the step of filling the cavity.Join the waitlist — get patent alerts
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