US2009068808A1PendingUtilityA1

Method of manufacturing a nonvolatile semiconductor memory device having a gate stack

Assignee: SAMSUNG ELECTRONICS CO LTDPriority: Apr 30, 2003Filed: Aug 28, 2008Published: Mar 12, 2009
Est. expiryApr 30, 2023(expired)· nominal 20-yr term from priority
H10D 64/01342H10B 43/30H10D 64/693H10D 64/691H10D 64/685H10D 64/037H10D 30/69H10D 30/0413
49
PatentIndex Score
0
Cited by
0
References
0
Claims

Abstract

A nonvolatile semiconductor memory device includes a semiconductor substrate having a source region and a drain region, and a gate stack formed on the semiconductor substrate between and in contact with the source and drain regions. The gate stack includes, in sequential order from the substrate: a tunneling film; a first trapping material film doped with a first predetermined impurity, the first trapping material film having a higher dielectric constant than the nitride film (Si 3 N 4 ); a first insulating film having a higher dielectric constant than a nitride film; and a gate electrode. Such a nonvolatile semiconductor memory device can effectively control the trap density according to the doping concentration, thereby increasing the write/erase speed of data at a low operating voltage.

Claims

exact text as granted — not AI-modified
1 - 24 . (canceled) 
   
   
       25 . A method of manufacturing a nonvolatile semiconductor memory device, comprising:
 forming a tunneling oxide film;   forming a first trapping material film doped with a first predetermined impurity, the first trapping material film having a higher dielectric constant than that of a nitride film(Si 3 N 4 );   forming a first insulating film having a higher dielectric constant than that of the nitride film;   forming a gate electrode, wherein the tunneling oxide film, the first trapping material film, the first insulating film, and the gate electrode are sequentially deposited on a semiconductor substrate;   defining a gate region on the gate electrode;   forming a gate stack by removing the gate electrode, the first insulating film, the first trapping material film, and the tunneling oxide film outside the gate region; and   forming a source and drain region around the gate stack on the semiconductor substrate.   
   
   
       26 . The method as claimed in  claim 25 , further comprising forming an oxide film on at least one of the tunneling oxide film and the first trapping material film. 
   
   
       27 . The method as claimed in  claim 26 , further comprising:
 forming a second trapping material film doped with a second predetermined impurity; and   forming a second insulating film on the second trapping material film, the second trapping material film and a second insulating film being between the first insulating film and the gate electrode.   
   
   
       28 . The method as claimed in  claim 27 , further comprising forming an oxide film on at least one of the tunneling oxide, the first trapping material film, the first insulating layer and the second trapping material film. 
   
   
       29 . The method as claimed in  claim 25 , wherein the first trapping material film is a film selected from the group consisting of HfO 2  film, ZrO 2  film, Ta 2 O 5  film, TiO 2  film and Al 2 O 3  film. 
   
   
       30 . The method as claimed in  claim 25 , wherein the first insulating film is a film selected from the group consisting of HfO 2  film, ZrO 2  film, Ta 2 O 5  film, and TiO 2  film. 
   
   
       31 . The method as claimed in  claim 26 , wherein the oxide film is an aluminum oxide film. 
   
   
       32 . The method as claimed in  claim 27 , wherein the second trapping material film is a film selected from the group consisting of HfO 2  film, ZrO 2  film, Ta 2 O 5  film, TiO 2  film, and Al 2 O 3  film. 
   
   
       33 . The method as claimed in  claim 27 , wherein the second insulating film is a film selected from the group consisting of HfO 2  film, ZrO 2  film, Ta 2 O 5  film, and TiO 2  film. 
   
   
       34 . The method as claimed in  claim 25 , wherein the first predetermined impurity is a lanthanide at a doping concentration of approximately 1˜20%. 
   
   
       35 . The method as claimed in  claim 27 , wherein the second predetermined impurity is a lanthanide at a doping concentration of approximately 1˜20%. 
   
   
       36 . The method as claimed in  claim 25 , wherein the first predetermined impurity is a lanthanide. 
   
   
       37 . The method as claimed in  claim 28 , further comprising,
 forming at least one of a first oxide film between the tunneling film and the first trapping material film, and a second oxide film between the first trapping material film and the first insulating film.   
   
   
       38 . The method as claimed in  claim 37 , wherein at least one of the first oxide film and the second oxide film is an aluminum oxide (Al 2 O 3 ) film. 
   
   
       39 . The method as claimed in  claim 27 , further comprising forming at least one of a first oxide film between the tunneling film and the first trapping material film, a second oxide film between the first trapping material film and the first insulating film, a third oxide film between the first insulating film and the second trapping material film, and a fourth oxide film between the second trapping material film and the second insulating film. 
   
   
       40 . The method as claimed in  claim 39 , wherein at least one of the first oxide film, the second oxide film, the third oxide film and the fourth oxide film is an aluminum oxide film. 
   
   
       41 . The method as claimed in  claim 27 , wherein the second trapping material film is formed of a material selected from at least one of HfO 2 , ZrO 2 , Ta 2 O 5 , TiO 2 , and Al 2 O 3 . 
   
   
       42 . The method as claimed in  claim 27 , wherein the first predetermined impurity is a lanthanide. 
   
   
       43 . The method as claimed in  claim 42 , wherein a doping concentration of the lanthanide is approximately 1˜20%. 
   
   
       44 . The method as claimed in  claim 27 , wherein the first trapping material film includes HfO 2 .

Join the waitlist — get patent alerts

Track US2009068808A1 — get alerts on status changes and closely related new filings.

We store only your email — no account needed. See our privacy policy.