Compound semiconductor device with mesa structure

Abstract

A compound semiconductor device having mesa-shaped element region, and excellent characteristics are provided. The compound semiconductor device has: an InP substrate; an epitaxial lamination mesa formed above the InP substrate and including a channel layer, a carrier supply layer above the channel layer and a contact cap layer above the carrier supply layer; ohmic source electrode and drain electrode formed on the cap layer; a recess formed by removing the cap layer between the source and drain electrodes, and exposing the carrier supply layer; an insulating film formed on the cap layer and retracted from an edge of the cap layer away from the recess; a gate electrode extending from the carrier supply layer in the recess to outside of the mesa; and air gap formed by removing side portion of the channel layer facing the gate electrode outside the mesa.

1 . A compound semiconductor device comprising:
 an InP substrate;
 a mesa formed above said InP substrate by an epitaxial lamination and including a channel layer, a carrier supply layer above said channel layer and a contact cap layer above said carrier supply layer; 
   a pair of ohmic electrodes formed on said cap layer and including a source electrode and a drain electrode;   a recess formed by removing said cap layer between said pair of ohmic electrodes, and exposing said carrier supply layer;   an insulating film formed on said cap layer and retracted from an edge of said cap layer toward a direction away from said recess;   a gate electrode extending from said carrier supply layer in said recess to an outside of said mesa; and   an air gap formed by removing a side portion of said channel layer facing a portion of said gate electrode outside said mesa.   
   
   
       2 . The compound semiconductor device according to  claim 1 , wherein said gate electrode is disposed in said recess in such a manner that said gate electrode is spaced apart from said drain electrode and shifted near to said source electrode. 
   
   
       3 . The compound semiconductor device according to  claim 1 , wherein said gate electrode has a width broadened outward above edges of said channel layer. 
   
   
       4 . The compound semiconductor device according to  claim 3 , wherein said cap layer at least on a side of said source electrode has recesses near portions having the broadened width of the gate electrode. 
   
   
       5 . The compound semiconductor device according to  claim 1 , further comprising another insulating film formed on said mesa, covering a semiconductor surface of said recess, said other insulating film is removed between a lower surface of said gate electrode and said carrier supply layer. 
   
   
       6 . The compound semiconductor device according to  claim 1 , wherein said channel layer is an i-InGaAs layer, said carrier supply layer is an InAlAs layer, said cap layer is an n-InGaAs layer and said insulating film is an SiN film. 
   
   
       7 . A method for manufacturing a compound semiconductor device, comprising steps of:
 (A) growing an epitaxial lamination above an InP substrate by MOCVD, said epitaxial lamination including a channel layer, a carrier layer and a contact cap layer in this order from the lower level, and etching said cap layer, said carrier supply layer and said channel layer to form a mesa;   (B) forming a pair of ohmic electrodes on said cap layer, said pair of ohmic electrodes being a source electrode and a drain electrode;   (C) forming an insulating film on said cap layering, said insulating film covering said source electrode and said drain electrode, and forming a recess forming opening by dry-etching said insulating film between said pair of ohmic electrodes;   (D) selectively wet-etching said cap layer via said recess forming opening to form a recess broader than said recess forming opening and expose said carrier supply layer;   (E) etching and removing a hood portion of said insulating film protruding at least above said recess;   (F) forming a resist pattern having a gate opening traversing said mesa and reaching above steps outside said mesa;   (G) side-etching a side of said channel layer exposed at a side surface of said mesa via said gate electrode opening by wet etching to form an air gap portion; and   (H) forming a gate electrode forming metal layer on a semiconductor surface exposed in said gate electrode forming opening and on said resist pattern, performing lift-off to form a gate electrode extending from said carrier supply layer to an outside of said mesa.   
   
   
       8 . The method for manufacturing a compound semiconductor device according to  claim 7 , wherein said step (D) uses mixture liquid of phosphoric acid, aqueous solution of hydrogen peroxide, and water and said step (G) used mixture liquid of citric acid, aqueous solution of hydrogen peroxide, and water. 
   
   
       9 . The method for manufacturing a compound semiconductor device according to  claim 7 , further comprising steps of:
 (I) forming another insulating film on said mesa between said steps (E) and (F), said other insulating film covering a surface of said recess; and   (J) etching and removing said other insulating film exposed in said gate electrode opening between said steps (F) and (G).   
   
   
       10 . The method for manufacturing a compound semiconductor device according to  claim 7 , wherein said gate electrode opening is disposed in said recess in such a manner that said gate electrode opening is spaced apart from said drain electrode and is shifted near to said source electrode. 
   
   
       11 . The method for manufacturing a compound semiconductor device according to  claim 7 , wherein said gate electrode opening has a width broadened outward above edges of said channel layer. 
   
   
       12 . The method for manufacturing a compound semiconductor device according to  claim 11 , wherein said recess forming opening has an opening protruding and surrounding portions having the broadened width of said gate electrode.