US2009055624A1PendingUtilityA1
Control of processing elements in parallel processors
Est. expirySep 17, 2022(expired)· nominal 20-yr term from priority
Inventors:Graham Kirsch
G06F 12/06G06F 15/8023G06F 15/17337
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Claims
Abstract
The present invention relates to the control of an array of processing elements in a parallel processor using row and column select lines. For each column in the array, a column select line connects to all of the processing elements in the column. For each row in the array, a row select line connecting to all of the processing elements in the row. A processing element in the array may be selected by activation of its row and column select lines.
Claims
exact text as granted — not AI-modified1 . A parallel processor comprising:
an array of processing elements arranged in rows and columns; for each column in the array, a column select line connecting to all of the processing elements in the column; and for each row in the array, a row select line connecting to all of the processing elements in the row, wherein a processing element in the array may be selected by activation of its row and column select lines.
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