Organic thin film transistor array substrate and liquid crystal display including the same

Abstract

An organic thin film transistor array substrate including a substrate divided into an LCD region and an OTFT region; a first dielectric layer formed on the substrate in the LCD region and having a first uneven portion; an organic semiconducting layer formed on the substrate in the OTFT region; a gate, source, and drain formed in the OTFT region, wherein the source and drain are in contact with the organic semiconducting layer to form a channel between the source and drain; and a pixel electrode formed on the first uneven portion of the first dielectric layer in the LCD region.

1 - 22 . (canceled) 
   
   
       23 . A process for fabricating an organic thin film transistor array substrate, comprising the following steps:
 providing a substrate divided into an LCD region and an OTFT region;   forming a first dielectric layer having a first uneven portion on the substrate in the LCD region;   forming an organic semiconducting layer on the substrate in the OTFT region;   forming a gate, a source, and a drain in the OTFT region, such that the source and the drain are in contact with the organic semiconducting layer to form a channel between the source and the drain; and   forming a pixel electrode on the first uneven portion of the first dielectric layer in the LCD region;   wherein the organic thin film transistor is bottom-gate type and the process comprises the following steps:
 providing a substrate divided into an LCD region and an OTFT region; 
 forming a gate on the substrate in the OTFT region; 
 forming a dielectric layer in the LCD and OTFT regions to cover the gate; 
 patterning the dielectric layer to concurrently form a first dielectric layer having a first uneven portion in the LCD region and a second dielectric layer in the OTFT region; 
 forming an organic semiconducting layer on the second dielectric layer in the OTFT region; and 
 forming a conductive layer in the LCD and OTFT regions, patterning the conductive layer to concurrently form a pixel electrode on the first uneven portion of the first dielectric layer in the LCD region and a source and drain in the OTFT region, such that the source and drain are in contact with the organic semiconducting layer to form a channel between the source and drain; and 
   further comprising, after patterning the dielectric layer and before forming the organic semiconducting layer:   forming an alignment film on the second dielectric layer in the OTFT region, such that the organic semiconducting layer aligns according to the alignment of the alignment film.   
   
   
       24 . The process as claimed in  claim 23 , wherein the step of forming the alignment film comprises:
 forming a third dielectric layer, irradiating the third dielectric layer by an ion beam through a mask, and then developing.   
   
   
       25 . The process as claimed in  claim 23 , wherein the step of forming the alignment film comprises:
 forming a photoresist layer, exposing the photoresist layer by light through a mask, and then developing.   
   
   
       26 . The process as claimed in  claim 23 , wherein the step of forming the alignment film comprises:
 forming a photoalignment organic layer; and   irradiating the photoalignment organic layer by polarized light through a mask, such that the photoalignment organic layer becomes an alignment film having molecular alignment.   
   
   
       27 . A process for fabricating an organic thin film transistor array substrate, comprising the following steps:
 providing a substrate divided into an LCD region and an OTFT region;   forming a first dielectric layer having a first uneven portion on the substrate in the LCD region;   forming an organic semiconducting layer on the substrate in the OTFT region;   forming a gate, a source, and a drain in the OTFT region, such that the source and the drain are in contact with the organic semiconducting layer to form a channel between the source and the drain; and   forming a pixel electrode on the first uneven portion of the first dielectric layer in the LCD region;   wherein the organic thin film transistor is bottom-gate type and the process comprises the following steps:
 providing a substrate divided into an LCD region and an OTFT region; 
 forming a gate on the substrate in the OTFT region; 
 forming a dielectric layer in the LCD and OTFT regions to cover the gate; 
 patterning the dielectric layer to concurrently form a first dielectric layer having a first uneven portion in the LCD region and a second dielectric layer in the OTFT region; 
 forming an organic semiconducting layer on the second dielectric layer in the OTFT region; and 
 forming a conductive layer in the LCD and OTFT regions, patterning the conductive layer to concurrently form a pixel electrode on the first uneven portion of the first dielectric layer in the LCD region and a source and drain in the OTFT region, such that the source and drain are in contact with the organic semiconducting layer to form a channel between the source and drain; and 
   wherein the step of patterning the dielectric layer further comprises:
 forming the second dielectric layer having a second uneven portion in the OTFT region, wherein the second uneven portion has alignment property, such that the organic semiconducting layer aligns according to the alignment of the second uneven portion; and 
   wherein the step of forming the first and second uneven portions comprises:
 masking the OTFT region and forming a first dielectric layer having a first uneven portion in the LCD region; and 
 masking the LCD region and forming a second dielectric layer having a second uneven portion in the OTFT region. 
   
   
   
       28 . A process for fabricating an organic thin film transistor array substrate, comprising the following steps:
 providing a substrate divided into an LCD region and an OTFT region;   forming a first dielectric layer having a first uneven portion on the substrate in the LCD region;   forming an organic semiconducting layer on the substrate in the OTFT region;   forming a gate, a source, and a drain in the OTFT region such that the source and the drain are in contact with the organic semiconducting layer to form a channel between the source and the drain; and   forming a pixel electrode on the first uneven portion of the first dielectric layer in the LCD region;   wherein the organic thin film transistor is top-gate type and the process comprises:
 providing a substrate divided into an LCD region and an OTFT region; 
 forming an organic semiconducting layer on the substrate in the OTFT region; 
 forming a source and drain on the organic semiconducting layer in the OTFT region to form a channel between the source and drain; 
 forming a dielectric layer on the substrate to cover the source and drain; 
 patterning the dielectric layer to form a first dielectric layer having a first uneven portion in the LCD region and to form a second dielectric layer on the source and drain in the OTFT region; 
 forming a metal layer on the first and second dielectric layer; and 
 patterning the metal layer to form a pixel electrode on the first dielectric layer in the LCD region and to form a gate on the second dielectric layer in the OTFT region. 
   
   
   
       29 . The process as claimed in  claim 28 , wherein the step of patterning the dielectric layer comprises: irradiating the dielectric layer by an ion beam through a mask and then developing. 
   
   
       30 . The process as claimed in  claim 28 , wherein the dielectric layer is a photoresist layer and the step of patterning the dielectric layer comprises: exposing the dielectric layer by light through a mask and then developing. 
   
   
       31 . The process as claimed in  claim 28 , further comprising, before forming the organic semiconducting layer, the following step:
 forming an alignment film on the substrate in the OTFT region, such that the organic semiconducting layer aligns according to the alignment of the alignment film.   
   
   
       32 . The process as claimed in  claim 31 , wherein the step of forming the alignment film comprises:
 forming a third dielectric layer, irradiating the third dielectric layer by an ion beam through a mask, and then developing.   
   
   
       33 . The process as claimed in  claim 31 , wherein the step of forming the alignment film comprises:
 forming a photoresist layer, exposing the photoresist layer by light through a mask, and then developing.   
   
   
       34 - 42 . (canceled)