Solid-state imaging device

Abstract

A solid-state imaging device includes a pixel array area having pixels including photoelectric transducers arranged as an array; signal lines wired for every pixel column in the pixel array area; and a plurality of noise reducers provided for the corresponding signal lines. Each of the noise reducers includes a first capacitor, one end of which is connected to the signal line; a first switch element, an input port of which is connected to the other end of the first capacitor; a second capacitor connected between an output port of the first switch element and a reference voltage; and a clamping element for clamping the voltage of a connecting node between the output port of the first switch element and the second capacitor to a predetermined voltage. The first capacitor is shared among the plurality of noise reducers.

1 - 5 . (canceled) 
   
   
       6 . A method of outputting signals from an array of a plurality of pixels, the method comprising the steps of:
 providing a pixel array area having pixels including photoelectric transducers arranged in column and row directions;   providing a vertical signal line wired for each pixel column in the pixel array area and extending in the column direction;   reading out a reset level signal and a pixel image signal from a first pixel in a first row of pixels to a first correlated double sampling (CDS) circuit connected to a corresponding vertical signal line during a first part of a single horizontal blanking interval,   reading out a reset level signal and a pixel image signal from a second pixel in a second row of pixels to a second correlated double sampling (CDS) circuit connected to said corresponding vertical signal line during a second part of said single horizontal blanking interval,   outputting a noise-reduced signal corresponding to said first pixel supplied from the array of pixels and outputting a noise-reduced signal corresponding to said second pixel supplied from the array of pixels.   
   
   
       7 . The method of outputting signals from an array of a plurality of pixels according to  claim 6 , wherein said first and second CDS circuits share a same first capacitor connected to said corresponding vertical signal line. 
   
   
       8 . The method of outputting signals from an array of a plurality of pixels according to  claim 7 , wherein said first and second CDS circuits also share a same clamping circuit connected to a side of said first capacitor opposite the side connected to said corresponding vertical signal line. 
   
   
       9 . The method of outputting signals from an array of a plurality of pixels according to  claim 7 , wherein said first CDS circuit comprises a first clamping circuit and said second CDS circuit comprises a second clamping circuit separate from said first clamping circuit. 
   
   
       10 . The method of outputting signals from an array of a plurality of pixels according to  claim 6 , wherein said first row of pixels is the same row as said second row of pixels. 
   
   
       11 . The method of outputting signals from an array of a plurality of pixels according to  claim 6 , wherein said first row of pixels is a different row than said second row of pixels. 
   
   
       12 . The method of outputting signals from an array of a plurality of pixels according to  claim 6 , wherein said noise-reduced signal corresponding to said first pixel supplied from the array of pixels and said noise-reduced signal corresponding to said second pixel supplied from the array of pixels are output simultaneously.