US2009032903A1PendingUtilityA1

Multiple voltage integrated circuit and design method therefor

Assignee: IBMPriority: Nov 24, 2003Filed: Oct 14, 2008Published: Feb 5, 2009
Est. expiryNov 24, 2023(expired)· nominal 20-yr term from priority
G06F 30/30G06F 2119/06G06F 30/39H10D 84/90
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Claims

Abstract

An integrated circuit (IC) design, method and program product for reducing IC design power consumption. The IC is organized in circuit rows. Circuit rows may include a low voltage island powered by a low voltage (V ddl ) supply and a high voltage island powered by a high voltage (V ddh ) supply. Circuit elements including cells, latches and macros are placed with high or low voltage islands to minimize IC power while maintaining overall performance. Level converters may be placed with high voltage circuit elements.

Claims

exact text as granted — not AI-modified
1 . An integrated circuit (IC) comprising:
 a plurality of circuit rows, at least one row of said plurality of circuit rows including three or more voltage islands;   at least one low voltage island in said at least one row, circuit elements in each said at least one low voltage island being powered by a low voltage (V ddl ) supply; and   at least one high voltage island in said at least one row, circuit elements in each said at least one high voltage island being powered by a high voltage (V ddh ) supply, V ddh  being a higher voltage than V ddl .

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