Level-Shifting Buffer

Abstract

An analog level-shifting buffer for providing signal amplitude and/or common mode adjustment is disclosed. In one example, a receiver system may include a first amplification stage that is powered, for example, via an I/O power supply (e.g., VDDIO) and a second amplification stage that is powered, for example, via a core logic power supply (e.g., VDD). Arranged between the first and second amplification stages may be the analog level-shifting buffer. The analog level-shifting buffer may include a set of variable impedance elements for controlling the output common mode and output signal swing of the level-shifting buffer.

1 . A PFET level shifting differential amplifier comprising:
 a first power supply;   a second power supply;   a pair of differential inputs;   a first PFET having a first gate in electrical communication with a first one of said pair of differential inputs, a first terminal in electrical communication with said first power supply, and a second terminal;   a second PFET in parallel with said first PFET, said second PFET having a second gate in electrical communication with a second one of said pair of differential inputs, a third terminal in electrical communication with said first power supply, and a fourth terminal;   a first adjustable impedance element electrically connected between said second terminal and said second power supply;   a second adjustable impedance element in parallel with said first adjustable impedance element, said second adjustable impedance element being electrically connected between said fourth terminal and said second power supply;   a first output node electrically connected between said second terminal and said first adjustable impedance element;   a second output node electrically connected between said fourth terminal and said second adjustable impedance element; and   a third adjustable impedance element electrically connected between said first and second output nodes, said third adjustable impedance element includes a first diode connected FET.   
   
   
       2 . A PFET level shifting differential amplifier according to  claim 1 , further comprising:
 a differential pair of transistors of an additional amplifier circuit, said differential pair of transistors electrically connected between a third power supply and said second power supply, each of said differential pair of transistors having a gate driven by one of said first and second output nodes;   a third PFET having a third gate in electrical communication with a node between said differential pair of transistors and said second power supply, a fifth terminal in electrical communication with said first power supply, and a sixth terminal in electrical communication with said second power supply, said first and second adjustable impedance elements being driven by a node electrically connected between said first power supply and said fifth terminal; and   a second diode connected FET having a seventh terminal in electrical communication with said third power supply, an eighth terminal in electrical communication with said second power supply, and a fourth gate in electrical communication with a fourth gate of a transistor electrically connected between said differential pair of transistors and said second power supply.   
   
   
       3 . A PFET level shifting differential amplifier according to  claim 1 , wherein a differential swing between said first and second output nodes is a function of a differential swing between said pair of differential inputs. 
   
   
       4 . A PFET level shifting differential amplifier according to  claim 1 , wherein an output common mode at said first and second output nodes is a function of said first power supply and/or an input common mode at said pair of differential inputs. 
   
   
       5 . A PFET level shifting differential amplifier according to  claim 1 , wherein said first power supply is an input/output power supply and said second power supply is ground. 
   
   
       6 . A PFET level shifting differential amplifier according to  claim 1 , wherein said first and second impedance elements each include a pass gate. 
   
   
       7 . A PFET level shifting differential amplifier comprising:
 a first power supply;   a second power supply;   a pair of differential inputs;   a first PFET having a first gate in electrical communication with a first one of said pair of differential inputs, a first terminal in electrical communication with said first power supply, and a second terminal;   a second PFET in parallel with said first PFET, said second PFET having a second gate in electrical communication with a second one of said pair of differential inputs, a third terminal in electrical communication with said first power supply, and a fourth terminal;   a first adjustable impedance element electrically connected between said second terminal and said second power supply;   a second adjustable impedance element in parallel with said first adjustable impedance element, said second adjustable impedance element being electrically connected between said fourth terminal and said second power supply, wherein said first and second adjustable impedance elements each include a first pass gate;   a first output node electrically connected between said second terminal and said first adjustable impedance element;   a second output node electrically connected between said fourth terminal and said second adjustable impedance element; and   a third adjustable impedance element electrically connected between said first and second output nodes, said third adjustable impedance element includes a first diode connected FET, wherein a differential swing between said first and second output nodes is a function of a differential swing between said pair of differential inputs and an output common mode at said first and second output nodes is a function of said first power supply.   
   
   
       8 . A PFET level shifting differential amplifier according to  claim 7 , wherein said first and second impedance elements each include a pass gate.