Method for forming high-k charge storage device
Abstract
Structures and methods of fabricating of a floating gate non-volatile memory device. In a first example embodiment, We form a bottom tunnel layer comprised of a lower oxide tunnel layer and a upper hafnium oxide tunnel layer; a charge storage layer comprised of a tantalum oxide and a top blocking layer preferably comprised of a lower hafnium oxide storage layer and an upper oxide storage layer. We form a gate electrode over the top blocking layer. We pattern the layers to form a gate structure and form source/drain regions to complete the memory device. In a second example embodiment, we form a floating gate non-volatile memory device comprised of: a bottom tunnel layer comprised essentially of silicon oxide; a charge storage layer comprised of a tantalum oxide; a top blocking layer comprised essentially of silicon oxide; and a gate electrode. The embodiments also comprise anneals and nitridation steps.
Claims
exact text as granted — not AI-modified1 . A method of fabricating a device comprising:
providing a substrate; forming a tunneling layer on the substrate; annealing the tunneling layer; forming a charge storage layer over the tunneling layer, wherein the charge storage layer comprises a metal oxide; and forming a blocking layer over the charge storage layer.
2 . The method of claim 1 wherein the metal oxide layer comprises a transitional metal.
3 . The method of claim 1 wherein the tunneling layer comprises a tunneling stack having a tunneling dielectric layer and a metal oxide layer.
4 . The method of claim 1 wherein the blocking layer comprises a blocking stack having a dielectric layer and a metal oxide layer.
5 . A method of forming a memory device comprising:
providing a substrate prepared with a tunneling layer; annealing the tunneling layer; forming a charge storage layer above the tunneling layer, wherein the charge storage layer comprises a metal oxide; annealing the charge storage layer in a nitrogen containing atmosphere; forming a blocking layer above the charge storage layer; and forming a gate electrode layer above the blocking layer.Join the waitlist — get patent alerts
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