Isolated tri-gate transistor fabricated on bulk substrate

Abstract

A method of forming an isolated tri-gate semiconductor body comprises patterning a bulk substrate to form a fin structure, depositing an insulating material around the fin structure, recessing the insulating material to expose a portion of the fin structure that will be used for the tri-gate semiconductor body, depositing a nitride cap over the exposed portion of the fin structure to protect the exposed portion of the fin structure, and carrying out a thermal oxidation process to oxidize an unprotected portion of the fin structure below the nitride cap. The oxidized portion of the fin isolates the semiconductor body that is being protected by the nitride cap. The nitride cap may then be removed. The thermal oxidation process may comprise annealing the substrate at a temperature between around 900° C. and around 1100° C. for a time duration between around 0.5 hours and around 3 hours.

1 . A method of forming an isolated semiconductor body comprising:
 patterning a bulk substrate to form a fin structure;   depositing an insulating material around the fin structure;   recessing the insulating material to expose a portion of the fin structure;   depositing a nitride cap over the exposed portion of the fin structure to protect the exposed portion of the fin structure;   carrying out a thermal oxidation process to oxidize an unprotected portion of the fin structure below the nitride cap, thereby isolating the protected portion of the fin structure from the bulk substrate; and   removing the nitride cap.   
     
     
         2 . The method of  claim 1 , wherein the depositing of the insulating material comprises depositing silicon dioxide using a process selected from the group consisting of epitaxial growth, CVD, PVD, and ALD. 
     
     
         3 . The method of  claim 1 , wherein a depth that the insulating material is recessed corresponds to a desired height of the isolated semiconductor body. 
     
     
         4 . The method of  claim 1 , wherein the nitride cap comprises silicon nitride. 
     
     
         5 . The method of  claim 1 , wherein the thermal oxidation process comprises annealing the substrate at a temperature between around 900° C. and around 1100° C. for a time duration between around 0.5 hours and around 3 hours. 
     
     
         6 . The method of  claim 1 , wherein the bulk substrate comprises a bulk silicon substrate. 
     
     
         7 . The method of  claim 1 , wherein the recessing of the insulating material comprises using an etching process to remove a portion of the insulating material. 
     
     
         8 . A method of forming an isolated semiconductor body comprising:
 patterning a bulk substrate to form a fin structure;   depositing an insulating material around the fin structure;   recessing the insulating material a first time to expose a first portion of the fin structure;   depositing a protective nitride cap over the first portion of the fin structure;   recessing the insulating material a second time to expose a second portion of the fin structure below the protective nitride cap;   thermally oxidizing the second portion of the fin structure, thereby isolating the first portion of the fin structure from the bulk substrate; and   removing the nitride cap.   
     
     
         9 . The method of  claim 8 , wherein the depositing of the insulating material comprises depositing silicon dioxide using a process selected from the group consisting of epitaxial growth, CVD, PVD, and ALD. 
     
     
         10 . The method of  claim 8 , wherein a depth that the insulating material is recessed the first time corresponds to a desired height of the isolated semiconductor body. 
     
     
         11 . The method of  claim 8 , wherein the nitride cap comprises silicon nitride. 
     
     
         12 . The method of  claim 8 , wherein the thermal oxidation process comprises annealing the substrate at a temperature between around 900° C. and around 1100° C. for a time duration between around 0.5 hours and around 3 hours. 
     
     
         13 . The method of  claim 8 , wherein the bulk substrate comprises a bulk silicon substrate. 
     
     
         14 . An apparatus comprising:
 a bulk substrate;   a semiconductor body formed by patterning a fin structure from the bulk substrate; and   an oxide layer isolating the semiconductor body from the bulk substrate, wherein the oxide layer is formed by thermally oxidizing a portion of the fin structure patterned from the bulk substrate.   
     
     
         15 . The apparatus of  claim 14 , wherein the bulk substrate and the semiconductor body are formed from the same material. 
     
     
         16 . The apparatus of  claim 15 , wherein the material comprises silicon. 
     
     
         17 . The apparatus of  claim 15 , wherein the material comprises silicon alloyed with a second material selected from the group consisting of germanium, indium antimonide, lead telluride, indium arsenide, indium phosphide, gallium arsenide, and gallium antimonide. 
     
     
         18 . The apparatus of  claim 14 , wherein the oxide layer comprises silicon dioxide.