Step-down circuit with stabilized output voltage
Abstract
The present invention provides a semiconductor integrated circuit device equipped with a negative feedback amplifier circuit or a step-down circuit which realizes stabilization of an output voltage effectively in response to a variation in power supply voltage. A constant current source is used to cause a bias current for setting current consumption to flow in a differential amplifying MOSFET. A capacitor is provided between an external power supply voltage and a predetermined circuit node to thereby detect a reduction in the external power supply voltage. An operating current of the differential amplifying MOSFET is increased through the use of a current flowing in the capacitor due to such an external power variation, thereby executing the operation of stabilizing an output voltage corresponding to the reduction in the external power supply voltage.
Claims
exact text as granted — not AI-modified1 . An electric device which has a NOR flash memory, an SRAM, and a controller controlling operations of said flash and said SRAM, said SRAM comprising:
a first power terminal which receives a first power supply voltage; a ground terminal which receives a ground potential; a voltage generating circuit which forms an internal power supply voltage which is lower than the first power supply voltage; and an internal circuit provided with the internal power supply voltage as a power supply, wherein the voltage generating circuit includes a differential amplifier circuit having a first input terminal supplied with a reference voltage, an output MOSFET which outputs the internal power supply voltage based on an output signal from the differential amplifier circuit, and a second input terminal which is supplied with the internal power supply voltage, wherein the differential amplifier circuit is provided with a first MOSFET having a gate connected to the first input terminal, a second MOSFET which has a gate connected to the second input terminal and a source commonly connected to a source of the first MOSFET, and a current source connected between common sources of the first and second MOSFETs and the ground terminal, wherein the current source includes third and fourth MOSFETs parallel-connected between the common sources and the ground terminal, wherein when the first power supply voltage remains higher than the reference voltage while a difference between the first power supply voltage and the reference voltage becomes large, a source-drain current of the third MOSFET is controlled so as to increase, and wherein when the difference between the first power supply voltage and the reference voltage becomes small, a source-drain current of the fourth MOSFET is controlled so as to increase.
2 . The electric device according to claim 1 ,
wherein the voltage generating circuit further includes a first capacitive element connected between the first power terminal and a gate of the third MOSFET, and a circuit which prevents a gate voltage of the third-MOSFET from being less than or equal to a set value.
3 . The electric device according to claim 1 ,
wherein the voltage generating circuit further includes a fifth MOSFET of first conductivity type having a source-drain path between the first power terminal and the ground terminal, and a second capacitive element connected between a source of the fifth MOSFET and the first power terminal, the fifth MOSFET has a gate which receives a bias voltage formed with the ground potential as the reference, and the source-drain current of the fourth MOSFET is controlled based on a source-drain current of the fifth MOSFET.Join the waitlist — get patent alerts
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