US2008308827A1PendingUtilityA1

Process for preparing a bonding type semiconductor substrate

Assignee: TOSHIBA KKPriority: Jun 9, 1999Filed: Mar 5, 2008Published: Dec 18, 2008
Est. expiryJun 9, 2019(expired)· nominal 20-yr term from priority
H10P 10/128H10W 72/536H10W 72/59H10W 72/90H10H 20/819H10H 20/817H10H 20/814H10H 20/018
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Claims

Abstract

The process comprises a step of growing epitaxially mixed crystals of a compound semiconductor represented by the composition formula In x (Ga 1-y Al y ) 1-x P on a GaAs substrate 12 to form an epi-wafer having an n-type cladding layer 14 (0.45≦x≦0.50, 0≦y≦1), an active layer 15 , a p-type cladding layer 16 and a cover layer 17 ; a step of removing the cover layer 17 by etching to expose the surface of the p-type cladding layer 16 ; a step of integrally joining a mirror-finished GaP substrate 11 on the p-type cladding layer 16 by placing the GaP substrate on the cladding layer at room temperature so that the mirror-finished surface of the GaP substrate may come into contact with the p-type cladding layer 16 ; a step of subjecting the resultant laminate to a heat treatment; a step of carrying out an etching treatment from the side of the GaAs substrate 12 to expose the n-type cladding layer 14 ; and a step of forming electrodes 19 on the surface of the n-type cladding layer 14 and on the back surface of the GaP substrate 11 , respectively.

Claims

exact text as granted — not AI-modified
1 - 17 . (canceled) 
   
   
       18 : A semiconductor light emitting element comprising: a substrate having a transparency to emission which is emitted from an active layer;
 a laminate provided on an upper surface of the substrate so that a part of the upper surface of the substrate is exposed, the laminate including the active layer;   a first electrode provided on an upper surface of the laminate; and   a second electrode provided on a lower surface of the substrate, the lower surface being opposite to the upper surface,   a light take-out portion being provided on a side of the upper surface of the substrate.   
   
   
       19 : The semiconductor light emitting element according to  claim 18 , wherein the first electrode is formed to cover only a part of the upper surface of the laminate. 
   
   
       20 : The semiconductor light emitting element according to  claim 18 , wherein the first electrode is formed to cover entirety of the upper surface of the laminate. 
   
   
       21 : The semiconductor light emitting element according to  claim 20 , wherein a ball of a wire is provided on the first electrode, the ball having a size which is substantially same as the first electrode. 
   
   
       22 : The semiconductor light emitting element according to  claim 18 , wherein the second electrode is formed to cover substantially entirety of the lower surface of the substrate. 
   
   
       23 : The semiconductor light emitting element according to  claim 18 , wherein a step is formed on a side of the upper surface of the substrate. 
   
   
       24 : The semiconductor light emitting element according to  claim 23 , wherein a size of the laminate is substantially same as a size of an upper surface of the step. 
   
   
       25 : The semiconductor light emitting element according to  claim 18 , wherein
 the substrate comprises GaP as a main component, and   the active layer comprises InGaAlP as a main component.   
   
   
       26 : A process for preparing a bonding type semiconductor substrate, comprising:
 a first step of forming a first epitaxial growth layer by epitaxially growing a semiconductor crystal on an etching stop layer which is formed on a first semiconductor substrate;   a second step of integrally joining to the first epitaxial growth layer a second semiconductor substrate which has at least one surface mirror-polished, by placing the second semiconductor substrate on the first epitaxial growth layer so that the second semiconductor substrate may come into a contact with the first epitaxial growth layer via the mirror-polished surface or a second epitaxial growth layer grown on the mirror-polished surface, thereby producing a resultant laminate; and   a third step of subjecting the resultant laminate to a heat treatment after at least part of a surface of the first semiconductor substrate has been removed therefrom.   
   
   
       27 : The process for preparing the bonding type semiconductor substrate according to  claim 26 , wherein the first step includes a step of removing a surface of the first epitaxial growth layer. 
   
   
       28 : The process for preparing a bonding type semiconductor substrate according to  claim 26 , wherein the first and second semiconductor substrates are joined by heating them, while only a part of the laminated first and second semiconductor substrates are pressed and other parts of the first and second semiconductor substrate are not pressed. 
   
   
       29 : The process for preparing the bonding type semiconductor substrate according to  claim 28 , wherein only a central part of the laminated first and second semiconductor substrates are pressed. 
   
   
       30 : The process for preparing the bonding type semiconductor substrate according to  claim 26 , wherein
 the first semiconductor substrate and the second semiconductor substrate are made of a compound semiconductor, and   the first and the second semiconductor substrates are joined by opposing a surface where an A plane preferentially appears in a main surface of the second semiconductor substrate to a surface where the B plane preferentially appears in a main surface of the first epitaxial growth layer, or by opposing a surface where the B plane preferentially appears in a main surface of the second semiconductor substrate to a surface where the A plane preferentially appears in a main surface of the first epitaxial growth layer.   
   
   
       31 : The process for preparing the bonding type semiconductor substrate according to  claim 26 , wherein the first and the second semiconductor substrates are joined so that a forward mesa direction on a opposing surface of the first semiconductor substrate and a forward mesa direction on a opposing surface of the second semiconductor substrate are orthogonal. 
   
   
       32 : A process for preparing a semiconductor light emitting element comprising:
 a step of forming an etching stop layer on a first semiconductor substrate, and forming a first epitaxial growth layer including a laminate having a first cladding layer, an active layer and a second cladding layer deposited in this order by epitaxially growing a mixed crystal of compound semiconductor on the etching stop layer;   a step of integrally joining to the first epitaxial growth layer a second semiconductor substrate which has at least one surface mirror-polished, by placing the second semiconductor substrate on the first epitaxial growth layer so that the second semiconductor substrate may come into contact with the first epitaxial growth layer via the mirror-polished surface or a second epitaxial growth layer grown on the mirror-polished surface, thereby producing a resultant laminate;   a step of subjecting the resultant laminate to a heat treatment after at least part of a surface of the first semiconductor substrate has been removed therefrom;   a step of exposing the first epitaxial growth layer by etching; and   a step of forming electrodes on a side of the exposed surface of the first epitaxial growth layer and on a backside of the second semiconductor substrate.   
   
   
       33 : The process for preparing the semiconductor light emitting element according to  claim 32 , further comprising
 a step of forming a cover layer on the first epitaxial growth layer; and   a step of exposing a surface of the first epitaxial growth layer by removing the cover layer.   
   
   
       34 : The process for preparing the semiconductor light emitting element according to  claim 32 , wherein the first and second semiconductor substrates are joined by heating them, while only a part of the laminated first and second semiconductor substrates are pressed and other parts of the first and second semiconductor substrate are not pressed. 
   
   
       35 : The process for preparing the semiconductor light emitting element according to  claim 34 , wherein only a central part of the laminated first and second semiconductor substrates are pressed. 
   
   
       36 : The process for preparing the semiconductor light emitting element according to  claim 32 , wherein
 the first semiconductor substrate and the second semiconductor substrate are made of compound semiconductor, and   the first and the second semiconductor substrates are joined by opposing a surface where an A plane preferentially appears in a main surface of the second semiconductor substrate to a surface where a B plane preferentially appears in a main surface of the first epitaxial growth layer, or by opposing a surface where the B plane preferentially appears in a main surface of the second semiconductor substrate to a surface where the A plane preferentially appears in a main surface of the first epitaxial growth layer.   
   
   
       37 : The process for preparing the semiconductor light emitting element according to  claim 32 , wherein the first and the second semiconductor substrates axe joined so that a forward mesa direction on a opposing surface of the first semiconductor substrate and a forward mesa direction on a opposing surface of the second semiconductor substrate are orthogonal.

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