Semiconductor device with connecting via and dummy via and method of manufacturing the same

Abstract

An underlying interconnect including a first barrier metal layer, an interconnect metal layer and a second barrier metal layer is formed on a semiconductor substrate, and an interlayer dielectric is formed thereon. Etching is performed with a photoresist defining an opening for a first via, and an opening for a second via having a larger bottom area than the first via opening, so as to form a first via hole and a second via hole in the interlayer dielectric. Since the second via hole has a larger diameter than the second via hole, the second via hole is opened up prior to the second via hole, and the underlying interconnect is exposed first at the bottom of the second via hole.

1 . A method of manufacturing a semiconductor device, comprising the steps of:
 forming a metal layer on a semiconductor substrate;   forming an insulating layer on said metal layer; and   performing an etching utilizing a mask defining a predetermined pattern, so as to form in said insulating layer a first via hole, and a second via hole having a larger diameter than said first via hole, and to thereby expose an upper surface of said metal layer,   wherein said performing said etching includes performing said etching such that said metal layer is exposed first at a bottom portion of said second via hole than in said first via hole.   
     
     
         2 . The method according to  claim 1 , wherein an etching gas that contains a halogen is utilized in said performing said etching. 
     
     
         3 . The method according to  claim 1 , further comprising, after said performing said etching:
 filling a conductive material in said first via hole and in said second via hole so as to form a first via and a second via; and   forming on said first via a conductor connected to said first via but not connected to said second via.   
     
     
         4 . The method according to  claim 2 , further comprising, after said performing said etching:
 filling a conductive material in said first via hole and in said second via hole so as to form a first via and a second via; and   forming on said first via a conductor connected to said first via but not connected to said second via.   
     
     
         5 . The method according to  claim 1 , wherein said metal layer is composed of an aluminum interconnect and a barrier metal layer composed of a titanium nitride layer formed on said aluminum interconnect such that said first via hole and said second via hole are formed on said barrier metal layer to expose said barrier metal layer.