Semiconductor device undergoing defect detection test

Abstract

A semiconductor device has a first operation mode and a second operation mode in which power supply with a higher voltage value than that in the first operation mode is provided. The semiconductor device includes a memory portion having memory cells for storing data and a power supply circuit portion supplying a first voltage and a second voltage to the memory portion. The memory portion writes or reads data to or from the memory cells based on the first voltage and the second voltage, and the power supply circuit portion provides a smaller voltage difference between the first voltage and the second voltage in the second operation mode as compared with the voltage difference in the first operation mode.

1 - 10 . (canceled) 
   
   
       11 . A semiconductor device comprising:
 a memory portion including a memory cell storing data; and   a power supply circuit portion supplying a first voltage and a second voltage to said memory portion, wherein   said memory portion writes data to or reads data from said memory cell based on said first voltage and said second voltage, and   said power supply circuit portion includes:   a boosted voltage generation circuit generating, based on said externally supplied positive voltage and ground voltage, a boosted voltage of said positive voltage;   a negative voltage generation circuit generating a negative voltage based on said externally supplied positive voltage and ground voltage; and   a switch circuit switching between supplying said boosted voltage as said first voltage and said negative voltage as said second voltage to said memory portion, and providing a smaller voltage difference between said first voltage and said second voltage relative to a voltage difference between said boosted voltage and said negative voltage.   
   
   
       12 . The semiconductor device according to  claim 11 , wherein
 said switch circuit supplies said externally supplied positive voltage as said first voltage and said negative voltage as said second voltage to said memory portion to provide said smaller voltage difference.   
   
   
       13 . The semiconductor device according to  claim 11 , wherein
 said switch circuit supplies said boosted voltage as said first voltage and said externally supplied ground voltage as said second voltage to said memory portion to provide said smaller voltage difference.