Carbon-containing semiconducting devices and methods of making thereof

Abstract

Embodiments of the present invention relate to semiconducting carbon-containing devices and methods of making thereof. The semi-conducting carbon containing devices comprise an n-type semiconducting layer and a p-type semiconducting layer, both of which are positioned over a substrate. The n-type semiconducting layer can be formed by pyrolyzing a carbon- and nitrogen-containing polymer, and the p-type semiconducting layer can be formed by pyrolyzing an aromatic- and aliphatic-group-containing polymer. In some embodiments, the devices are solar cell devices.

1 . A method of manufacturing a semiconducting device, comprising:
 forming a first polymer layer over a substrate, wherein the first polymer layer comprises nitrogen and carbon;   forming a second polymer layer over the substrate, wherein the second polymer layer comprises aromatic and aliphatic functional groups;   pyrolyzing the first polymer layer under substantially nonoxidizing conditions selected to transform the first polymer layer into an n-type semiconducting layer; and   pyrolyzing the second polymer layer under substantially nonoxidizing conditions selected to transform the second polymer layer into a p-type semiconducting layer.   
   
   
       2 . The method according to  claim 1 , wherein the first polymer layer is formed over the second polymer layer. 
   
   
       3 . The method according to  claim 1 , wherein the n-type semiconducting layer is in contact with the p-type semiconducting layer. 
   
   
       4 . The method according to  claim 1 , wherein the first polymer layer comprises at least one of polyimide, polyacrylonitrile, polyamide, and polyamideimide. 
   
   
       5 . The method according to  claim 4 , wherein the first polymer layer comprises polyimide. 
   
   
       6 . The method according to  claim 1 , wherein the second polymer layer comprises asphalt or petroleum pitch. 
   
   
       7 . The method according to  claim 1 , wherein the temperature during pyrolysis of the first polymer layer is from about 400° C. to about 1000° C. 
   
   
       8 . The method according to  claim 1 , wherein the temperature during pyrolysis of the second polymer layer is from about 400° C. to about 1000° C. 
   
   
       9 . The method according to  claim 1 , wherein the nonoxidizing conditions comprise a vacuum environment. 
   
   
       10 . The method according to  claim 1 , wherein forming the first polymer layer comprises a wet process. 
   
   
       11 . The method according to  claim 1 , wherein forming the second polymer layer comprises a wet process. 
   
   
       12 . The method according to  claim 10 , wherein the wet process comprises spin-coating and/or dip-coating. 
   
   
       13 . The method according to  claim 1 , further comprising forming a first electrode layer over the substrate and forming the first polymer layer over the first electrode layer. 
   
   
       14 . The method according to  claim 13 , wherein the first electrode layer comprises molybdenum. 
   
   
       15 . The method according to  claim 1 , further comprising forming a transparent conductive electrode layer over the p-type semiconducting layer. 
   
   
       16 . The method according to  claim 15 , wherein the transparent conductive electrode layer comprises indium tin oxide. 
   
   
       17 . A semiconducting device, comprising:
 a substrate;   an n-type semiconducting layer positioned over the substrate, the n-type semiconducting layer comprising a pyrolyzed carbon- and nitrogen-containing polymer; and   a p-type semiconducting layer positioned over the substrate, the p-type semiconducting layer comprising a pyrolyzed aromatic- and aliphatic-group-containing polymer.   
   
   
       18 . The device according to  claim 17 , wherein the p-type semiconducting layer is positioned over the n-type semiconducting layer. 
   
   
       19 . The device according to  claim 17 , comprising a p-n junction formed by contact of the p-type semiconducting layer with the n-type semiconducting layer. 
   
   
       20 . The device according to  claim 17 , having a band gap from about 0.1 to about 3.0 eV. 
   
   
       21 . The device according to  claim 17 , wherein the n-type semiconducting layer comprises a pyrolyzed polyimide. 
   
   
       22 . The device according to  claim 17 , wherein the p-type semiconducting layer comprises a pyrolyzed pitch selected from asphalt and a petroleum pitch. 
   
   
       23 . The device according to  claim 17 , wherein the p-type semiconducting layer and the n-type semiconducting layer are formed by pyrolysis under nonoxidizing conditions. 
   
   
       24 . The device according to  claim 17 , further comprising a first electrode layer positioned between the substrate and the n-type semiconducting layer. 
   
   
       25 . The device according to  claim 17 , further comprising a transparent conductive electrode layer positioned over the p-type semiconducting layer. 
   
   
       26 . The device according to  claim 17 , wherein the substrate comprises quartz or fused silica. 
   
   
       27 . The device according to  claim 17 , wherein the device is a solar cell. 
   
   
       28 . The device according to  claim 17 , wherein at least one of the semiconducting layers is less than about 20 micrometers thick. 
   
   
       29 . An n-type semiconducting layer made by a process that comprises pyrolyzing a polymer layer, wherein the polymer layer comprises nitrogen and carbon. 
   
   
       30 . The n-type semiconducting layer of  claim 29 , in the form of a film having a thickness from about 20 nanometers to about 40 microns. 
   
   
       31 . The n-type semiconducting layer of  claim 29 , in the form of a film having a thickness of about 20 microns or less. 
   
   
       32 . A p-type semiconducting layer made by a process that comprises pyrolyzing a polymer layer, wherein the polymer layer comprises aromatic and aliphatic functional groups. 
   
   
       33 . The p-type semiconducting layer of  claim 32 , in the form of a film having a thickness from about 20 nanometers to about 40 microns. 
   
   
       34 . The p-type semiconducting layer of  claim 32 , in the form of a film having a thickness of about 20 microns or less. 
   
   
       35 . A semiconducting device, comprising:
 a substrate;   an n-type semiconducting layer positioned over the substrate, the n-type semiconducting layer comprising a pyrolyzed carbon- and nitrogen-containing polymer; and   a p-type semiconducting layer positioned over the substrate, the p-type semiconducting layer comprising p-type silicon.   
   
   
       36 . A semiconducting device, comprising:
 a substrate;   an n-type semiconducting layer positioned over the substrate, the n-type semiconducting layer comprising n-type silicon; and   a p-type semiconducting layer positioned over the substrate, the p-type semiconducting layer comprising a pyrolyzed aromatic- and aliphatic-group-containing polymer.   
   
   
       37 . A method of manufacturing a semiconducting device, comprising:
 forming a first polymer layer over a substrate, wherein the first polymer layer comprises (i) nitrogen and carbon or (ii) aromatic and aliphatic functional groups;   forming a second polymer layer over the substrate, wherein the second polymer layer comprises (i) nitrogen and carbon or (ii) aromatic and aliphatic functional groups;   pyrolyzing one of the first or second polymer layers under substantially nonoxidizing conditions sufficient to transform the first or second polymer layer into a p-type semiconducting layer; and   pyrolyzing the other polymer layer under substantially nonoxidizing conditions sufficient to transform the other polymer layer into an n-type semiconducting layer.   
   
   
       38 . The method according to  claim 37 , wherein the first polymer layer comprises nitrogen and carbon. 
   
   
       39 . The method according to  claim 37 , wherein the second polymer layer comprises aromatic and aliphatic functional groups. 
   
   
       40 . The method according to  claim 37 , wherein pyrolysis to form a p-type semiconductor layer is conducted at a temperature about 400° C. to about 700° C. 
   
   
       41 . The method according to  claim 37 , wherein pyrolysis to form an n-type semiconductor layer is conducted at a temperature about 700° C. to about 1000° C. 
   
   
       42 . A semiconducting device made according to the method of  claim 37 . 
   
   
       43 . A method of manufacturing a semiconducting device, comprising:
 forming a first polymer layer over a substrate, wherein the first polymer layer comprises (i) nitrogen and carbon or (ii) aromatic and aliphatic functional groups;   forming a second polymer layer over the substrate, wherein the second polymer layer comprises (i) nitrogen and carbon or (ii) aromatic and aliphatic functional groups;   pyrolyzing the first polymer layer under substantially nonoxidizing conditions;   measuring to confirm that the first polymer layer is either is an n-type or p-type carrier;   pyrolyzing the second polymer layer under substantially nonoxidizing conditions; and   measuring to confirm that the second polymer layer is a carrier type that is different than the carrier type of the first polymer layer.   
   
   
       44 . A semiconducting device made according to the method of  claim 43 . 
   
   
       45 . A semiconducting device, comprising:
 a substrate;   an n-type semiconducting layer positioned over the substrate, wherein the n-type semiconducting layer comprises (i) a pyrolyzed carbon- and nitrogen-containing polymer or (ii) a pyrolyzed aromatic- and aliphatic-group-containing polymer; and   a p-type semiconducting layer positioned over the substrate, wherein the p-type semiconducting layer comprises (i) a pyrolyzed carbon- and nitrogen-containing polymer or (ii) a pyrolyzed aromatic- and aliphatic-group-containing polymer.   
   
   
       46 . The semiconducting device according to  claim 45 , wherein the n-type semiconducting layer comprises nitrogen and carbon. 
   
   
       47 . The semiconducting device according to  claim 45 , wherein the p-type semiconducting layer comprises aromatic and aliphatic functional groups. 
   
   
       48 . The method according to  claim 11 , wherein the wet process comprises spin-coating and/or dip-coating.