Method for Stabilizing Asynchronous Interfaces

Abstract

A method and computer system apparatus for asynchronous data transfer between a source and sink without the use of an asynchronous control signal. includes metastability circuits, data change detection logic, a stability window delay counter, and a mux/register pair to allow for the holding of previous stable data during the transition. While the processing logic employed specifically applies to asynchronous logic, the logic can be extended to synchronous or untimed interfaces as well. Also disclosed is a programmable means to adjust the window delay.

1 . A method of data transfer from a source to a sink in a computer system comprising the steps of:
 launching data onto a data bus;   capturing with a sink circuit from said data bus using sink circuit logic including meta-stability register and stability registers, data change detection logic and a stability window delay counter and a multiplexor register pair are provided for holding previous data during a transfer and   wherein said sink circuit's meta-stability registers stage the input data bus, and a stability register holds previous data from said data bus coupled onto a sink circuit output data bus, and wherein a multiplexor selects between the output of a last of said stability registers and an output of said stability register which holds previous data from said data bus coupled onto a sink circuit output data bus, and with said sink circuit detecting changes in data received at the sink; allowing previous data to be observed when a change in data is detected; releasing previous data and allowing new data to be observed after a time period.   
   
   
       2 . The method according to  claim 1  wherein said sink circuit includes a stability counter with a load input control, a load input value bus, and a decrement increment control. 
   
   
       3 . The method according to  claim 2  wherein said sink circuit further includes an edge detect circuit which compares input and output buses of said stability register to determine if a change in data has occurred which also activates said load input of said stability counter thereto. 
   
   
       4 . The method according to  claim 3  wherein said sink circuit further includes a counter detect circuit which decrements the counter when it has a non-zero value and which also controls said multiplexor to freeze said stability register at its present value when the counter is not zero. 
   
   
       5 . The method according to  claim 4  wherein said stability counter will decrement when the load and the decrement inputs are activated simultaneously. 
   
   
       6 . The method according to  claim 1  wherein said sink circuit includes a programmable register coupled to said stability register circuit. 
   
   
       7 . The method according to  claim 1  wherein said sink circuit stabilizes one or more data bus signals across an asynchronous or untimed interface of said computer system without the use of a separate control signal for computer system data transfer. 
   
   
       8 . The method in accordance with  claim 1  wherein said data transfer is an asynchronous data transfer. 
   
   
       9 . The method in accordance with  claim 8  wherein said data transfer is an asynchronous data transfer using no asynchronous control signal. 
   
   
       10 . The method in accordance with  claim 1  wherein said time period is implemented with a counter. 
   
   
       11 . The method in accordance with  claim 6  wherein said time period is programmable. 
   
   
       12 . The method according to  claim 1  wherein said data is used for determining in detecting changes in data received at the sink. 
   
   
       13 . The method according to  claim 6  wherein stabilization logic prevents data from transitioning through incorrect states prior to reaching a new steady state. 
   
   
       14 . The method according to  claim 7  wherein said data transfers in the absence of a separate control signal. 
   
   
       15 . The method according to  claim 6  wherein a programmable delay provides a window for detecting skew in the data being transferred.