Generating transmission-code compliant test sequences

Abstract

Disclosed herein are exemplary methods, apparatus, and systems for generating test sequences that can be used to evaluate high-speed circuit pathways. The disclosed methods, apparatus, and systems can be used, for example, in a printed circuit board or integrated circuit design flow to analyze signal integrity or other electrical behavior. For example, in one exemplary embodiment, a sequence of code words to be input on a circuit channel is determined in a nonrandom manner. In this embodiment, the sequence of code words complies with a transmission code (for example, the 8b10b transmission code) and is designed to cause the output voltage of the channel to be reduced during a time period in which the channel outputs a logic high value.

1 . A method of generating a test sequence of bits for testing the electrical behavior of a circuit channel, comprising:
 dividing a sampled pulse response for the circuit channel into a series of bit groups, the respective lengths of the bit groups in the series complying with a transmission code;   determining possible code word types corresponding to the bit groups of the sampled pulse response, the possible code word types also complying with the transmission code;   computing cumulative costs for one or more of the possible code word types, the cumulative cost for a respective code word type indicating how effective a sequence comprising a code word of the respective code word type together with one or more other code words is at altering the intended output of the circuit channel when the sequence is included in the test sequence;   generating the test sequence by selecting a sequence of code words based at least in part on the determined cumulative costs; and   storing the test sequence on one or more computer-readable media.   
   
   
       2 . The method of  claim 1 , further comprising computing local costs for the one or more of the possible code word types, the local cost for a respective code word type indicating how effective a code word of the respective code word type is at altering an intended output of the circuit channel when the code word is included in the test sequence. 
   
   
       3 . The method of  claim 2 , wherein the cumulative cost for the respective code word type is computed in part from local costs of the other code words in the sequence. 
   
   
       4 . The method of  claim 2 , wherein the act of computing the local costs comprises evaluating possible code words of a respective code word type to determine which of the possible code words produces the lowest local cost for that respective code word type. 
   
   
       5 . The method of  claim 1 , wherein the act of determining the cumulative costs includes determining cumulative costs of sequences that represent full test sequences, and wherein the act of generating the test sequence comprises selecting the full test sequence producing the lowest cumulative cost. 
   
   
       6 . The method of  claim 1 , wherein the code word of the respective code word type is a first code word in the sequence and wherein the act of computing cumulative costs comprises selecting a second code word to be sequentially adjacent to the first code word from among multiple possible second code words, the multiple second code words being of code word types different than the first code word. 
   
   
       7 . The method of  claim 6 , wherein the method further comprises:
 determining allowable transitions between the possible code word types; and   determining the multiple possible second code words based at least in part on the determined allowable transitions.   
   
   
       8 . The method of  claim 6 , wherein the multiple possible second code words have associated cumulative costs and wherein the selection comprises selecting the second code word having the lowest associated cumulative cost. 
   
   
       9 . The method of  claim 1 , wherein the act of dividing includes orienting the bit groups in a first orientation relative to a leading bit in the sampled pulse response, the method further comprising repeating the acts of dividing, determining, and computing for one or more other bit group orientations relative to the leading bit. 
   
   
       10 . The method of  claim 1 , further comprising:
 simulating application of a single pulse applied to the circuit channel, thereby generating a pulse response; and   dividing the pulse response into samples, thereby generating the sampled pulse response, the samples being determined according to a bit rate at which the circuit channel is to operate.   
   
   
       11 . The method of  claim 1 , wherein the transmission code is the 8b 10b transmission code. 
   
   
       12 . The method of  claim 1 , wherein the sampled pulse response is an inverted sampled pulse response. 
   
   
       13 . The method of  claim 1 , wherein the test sequence minimizes an eye opening of an eye diagram that displays a representation of the circuit channel's response to the test sequence. 
   
   
       14 . One or more computer-readable media storing computer-executable instructions for causing a computer to perform the method of  claim 1 . 
   
   
       15 . One or more computer-readable media storing a test sequence generated by the method of  claim 1 . 
   
   
       16 . A method, comprising:
 nonrandomly determining a sequence of code words to be input on a circuit channel, the sequence of code words complying with a transmission code and being designed to cause the output voltage of the channel to be reduced during a time period in which the channel outputs a logic high value; and   storing the sequence on one or more computer-readable media.   
   
   
       17 . The method of  claim 16 , wherein the act of nonrandomly determining the sequence comprises dividing a sampled pulse response for the circuit channel into bit groups, the bit groups having lengths complying with the transmission code. 
   
   
       18 . The method of  claim 17 , wherein the act of nonrandomly determining the sequence further comprises identifying possible code word types for the bit groups of the divided sampled pulse response. 
   
   
       19 . The method of  claim 16 , wherein the act of nonrandomly determining the sequence comprises computing a value indicative of the impact a candidate code word has on reducing the output voltage of the circuit channel when the candidate code word is included in the sequence. 
   
   
       20 . The method of  claim 16 , wherein the act of nonrandomly determining the sequence comprises computing a value indicative of the impact a subsequence of code words has on reducing the output voltage of the circuit channel when the subsequence of code words is included in the sequence. 
   
   
       21 . The method of  claim 16 , wherein the act of nonrandomly determining the sequence comprises:
 evaluating a code word in the sequence; and   selecting a sequence of code words to precede the code word from among multiple possible sequences of code words, the selection being based at least in part on the impact a respective one of the multiple possible sequences has on the output voltage of the circuit channel when the respective one of the multiple possible sequences is included in the sequence.   
   
   
       22 . The method of  claim 16 , wherein the act of nonrandomly determining the sequence comprises:
 evaluating individual code words for possible inclusion in the sequence; and   selecting one or more of the code words for inclusion in the sequence based at least in part on the effect the one or more of the code words have on the output voltage of the circuit channel when the code words are included in the sequence.   
   
   
       23 . The method of  claim 16 , wherein the transmission code is the 8b10b transmission code. 
   
   
       24 . The method of  claim 16 , wherein the sequence of code words is the worst case sequence. 
   
   
       25 . The method of  claim 16 , wherein the sequence of code words minimizes an eye opening of an eye diagram that displays a representation of the circuit channel's response to the sequence of code words. 
   
   
       26 . One or more computer-readable media storing computer-executable instructions for causing a computer to perform the method of  claim 16 . 
   
   
       27 . One or more computer-readable media storing the sequence generated by the method of  claim 16 . 
   
   
       28 . A method of generating a test sequence of bits for testing the electrical behavior of a circuit channel, comprising:
 dividing a test sequence unconstrained by any transmission code into a series of bit groups, the lengths of the bit groups in the series complying with a transmission code;   evaluating a first bit group in the series for compliance with the transmission code;   if the first bit group is determined not to comply with the transmission code, modifying one or more bits in the first bit group so that the first bit group complies with the transmission code; and   storing the modified first bit group on one or more computer-readable media.   
   
   
       29 . The method of  claim 28 , further comprising:
 evaluating a second bit group in the series for compliance with the transmission code, the second bit group being adjacent to the first bit group in the series;   if the second bit group is determined not to comply with the transmission code, modifying one or more bits in the second bit group so that the second bit group complies with the transmission code; and   storing the modified second bit group on the one or more computer-readable media.   
   
   
       30 . The method of  claim 29 , wherein the first bit group has a neutral disparity, and wherein the method further comprises determining an initial disparity for the first bit group, the determination being based at least in part on a disparity of the second bit group. 
   
   
       31 . The method of  claim 28 , further comprising:
 sequentially evaluating the remaining bit groups in the series for compliance with the transmission code;   modifying respective ones of the remaining bit groups if they do not comply with the transmission code; and   storing the modified bit groups on the one or more computer-readable media.   
   
   
       32 . The method of  claim 28 , further comprising generating the test sequence unconstrained by any transmission code. 
   
   
       33 . The method of  claim 32 , wherein the act of generating the test sequence unconstrained by any transmission code comprises:
 simulating application of a single pulse applied to the circuit channel, thereby generating a pulse response;   dividing the pulse response into samples, thereby generating a sampled pulse response, the samples being determined according to a bit rate at which the circuit channel will operate and having a polarity and a magnitude; and   assigning test sequence bits having polarities opposite to the polarities of corresponding samples in the sampled pulse response.   
   
   
       34 . The method of  claim 28 , wherein the first bit group corresponds to a position in the test sequence adjacent to the largest value in a sampled pulse response of the channel. 
   
   
       35 . One or more computer-readable media storing computer-executable instructions for causing a computer to perform the method of  claim 28 . 
   
   
       36 . One or more computer-readable media storing the test sequence generated by the method of  claim 28 .