Method of Forming a Fully Silicided Semiconductor Device with Independent Gate and Source/Drain Doping and Related Device

Abstract

A method of forming a fully silicided semiconductor device with independent gate and source/drain doping and related device. At least some of the illustrative embodiments are methods comprising forming a gate stack over a substrate (the gate stack comprising a polysilicon layer and a blocking layer), and performing an ion implantation into an active region of the substrate adjacent to the gate stack (the blocking layer substantially blocks the ion implantation from the polysilicon layer).

1 - 16 . (canceled) 
   
   
       17 . A semiconductor device comprising:
 a substrate;   a gate stack on the substrate, the gate stack having a first height, and the gate stack comprising a blocking layer substantially impervious to ion implantation; and   a spacer along a sidewall of the gate stack, the spacer having a second height;   wherein the first height is substantially equal to the second height.   
   
   
       18 . The semiconductor device according to  claim 17  further comprising a cover layer on an active region of the substrate adjacent to the gate stack, wherein the cover layer protects the active region from silicidation. 
   
   
       19 . A semiconductor device comprising:
 a substrate;   a gate stack on the substrate, the gate stack having a first height, and the gate stack comprising a silicide layer; and   a spacer along a sidewall of the gate stack, the spacer having a second height;   wherein the first height is substantially unequal to the second height.   
   
   
       20 . The semiconductor device according to  claim 19  further comprising a silicided active region within the substrate. 
   
   
       16 . The method according to claim  1  wherein forming the gate stack further comprises forming an antireflective layer over the blocking layer. 
   
   
       17 . A semiconductor device comprising:
 a substrate;   a gate stack on the substrate, the gate stack having a first height, and the gate stack comprising a blocking layer substantially impervious to ion implantation; and   a spacer along a sidewall of the gate stack, the spacer having a second height;   wherein the first height is substantially equal to the second height.   
   
   
       18 . The semiconductor device according to  claim 17  further comprising a cover layer on an active region of the substrate adjacent to the gate stack, wherein the cover layer protects the active region from silicidation. 
   
   
       19 . A semiconductor device comprising:
 a substrate;   a gate stack on the substrate, the gate stack having a first height, and the gate stack comprising a silicide layer; and   a spacer along a sidewall of the gate stack, the spacer having a second height;   wherein the first height is substantially unequal to the second height.   
   
   
       20 . The semiconductor device according to  claim 19  further comprising a silicided active region within the substrate.