Dual storage node pixel for CMOS sensor
Abstract
A sensor includes control circuitry and a pixel having a photo site, a first storage node and a second storage node. The control circuitry operates to transfer a first collected signal produced by light from a first image from the photo site to the first storage node during a first period, to transfer a second collected signal produced by light from a second image from the photo site to the second storage node during a second period that follows the first period and to transfer the first and second collected signals out of the pixel during a third period that follows the second period. The first storage node includes a first capacitor and a first reset gate coupled directly between the first capacitor and a reset voltage. The second storage node includes a second capacitor and a second reset gate coupled directly between the second capacitor and the reset voltage.
Claims
exact text as granted — not AI-modified1 . A sensor comprising:
a pixel having a photo site, a first storage node and a second storage node; and control circuitry to transfer a first collected signal produced by light from a first image from the photo site to the first storage node during a first period, to transfer a second collected signal produced by light from a second image from the photo site to the second storage node during a second period that follows the first period, and to transfer the first and second collected signals out of the pixel during a third period that follows the second period, wherein the first storage node includes a first capacitor and a first reset gate coupled directly between the first capacitor and a reset voltage, and wherein the second storage node includes a second capacitor and a second reset gate coupled directly between the second capacitor and the reset voltage.
2 . The sensor of claim 1 , wherein:
the photo site includes a photo detector; the photo detector is one of a photodiode and a pinned photodiode; and the first and second collected signals are charge type signals.
3 . A sensor comprising:
a pixel that includes a first storage node, a second storage node and a photo detector that is one of a photodiode and a pinned photodiode; and control circuitry to transfer a first collected signal produced by light from a first image from the photo detector to the first storage node during a first period, to transfer a second collected signal produced by light from a second image from the photo detector to the second storage node during a second period, and to transfer the first and second collected signals out of the pixel during a third period that follows the second period, wherein the first storage node includes a first charge holding capacitor and a first charge transfer gate, wherein the first charge transfer gate is the only charge transfer gate coupled between the first charge holding capacitor and the photo detector, wherein the second storage node includes a second charge holding capacitor and a second charge transfer gate, and wherein the second charge transfer gate is the only charge transfer gate coupled between the second charge holding capacitor and the photo detector.
4 . The sensor of claim 3 , wherein:
the pixel further includes an output buffer; the first storage node further includes an output voltage switch coupled between the first charge holding capacitor and the output buffer; and the second storage node further includes an output voltage switch coupled between the second charge holding capacitor and the output buffer.
5 . A sensor comprising:
a pixel that includes a first storage node, a second storage node and a photo detector that is one of a photodiode and a pinned photodiode; and control circuitry to transfer a first collected signal produced by light from a first image from the photo detector to the first storage node during a first period, to transfer a second collected signal produced by light from a second image from the photo detector to the second storage node during a second period, and to transfer the first and second collected signals out of the pixel during a third period that follows the second period, wherein the first storage node includes a first charge holding capacitor, a first output voltage switch and a first output buffer coupled between the first charge holding capacitor and the first output voltage switch, and wherein the second storage node includes a second charge holding capacitor, a second output voltage switch and a second output buffer coupled between the second charge holding capacitor and the second output voltage switch.
6 . The sensor of claim 2 , wherein the photo detector is a pinned photodiode.
7 . The sensor of claim 3 , wherein:
the control circuitry is coupled to the first charge transfer gate to provide a first control signal that can enable charges to freely transfer between the photo detector and the first charge holding capacitor throughout the first period; and the control circuitry is coupled to the second charge transfer gate to provide a second control signal that can enable charges to freely transfer between the photo detector and the second charge holding capacitor throughout the second period.
8 . A sensor comprising:
a pixel that includes a first storage node, a second storage node, a photo detector and a preset gate, the preset gate being the only gate coupled between the photo detector and a preset voltage, the photo detector being one of a photodiode and a pinned photodiode; and control circuitry to transfer a first collected signal produced by light from a first image from the photo detector to the first storage node during a first period, to transfer a second collected signal produced by light from a second image from the photo detector to the second storage node during a second period, and to transfer the first and second collected signals out of the pixel during a third period that follows the second period, wherein the control circuitry is coupled to the preset gate to provide the preset gate with a preset signal.
9 . The sensor of claim 8 , wherein:
the control circuitry is coupled to the preset gate to provide a preset gate control signal to the preset gate; and the control circuitry controls a potential of the preset signal to be less than a potential of the preset gate control signal minus a transistor threshold voltage.
10 . The sensor of claim 9 , wherein the potential of the preset gate control signal differs from the potential of the preset signal by the transistor threshold voltage.
11 . The sensor of claim 8 , wherein:
the control circuitry is coupled to the preset gate to provide the preset gate with a preset signal at a potential that operates as a drain; and the control circuitry is coupled to the preset gate to provide a preset gate control signal at a potential that enables the preset gate to transfer a quantity of charge into the preset signal when accumulated charges in the photo detector exceed a capacity of the photo detector to hold charge.
12 . The sensor of claim 8 , wherein:
the control circuitry is coupled to the preset gate to provide the preset gate with the preset signal at a potential that operates as a drain; the control circuitry is coupled to the preset gate to provide a preset gate control signal; the control circuitry provides the preset gate control signal during a first portion of the first period at a first potential that enables the preset gate to transfer substantially all photo generated charge into the preset signal; and the control circuitry provides the preset gate control signal during a second portion of the first period at a second potential that enables the preset gate to transfer a quantity of charge into the preset signal when accumulated charges in the photo detector exceed a capacity of the photo detector to hold charge.
13 . The sensor of claim 3 , wherein:
the first storage node includes a first reset gate coupled to the first charge holding capacitor; and the second storage node includes a second reset gate coupled to the second charge holding capacitor.
14 . The sensor of claim 5 , further comprising:
a first reset gate coupled to an input of the first output buffer; and a second reset gate coupled to an input of the second output buffer.
15 . The sensor of claim 3 , further comprising:
a first output buffer coupled to the first charge holding capacitor; a first row switch coupled between the first output buffer and a first column bus; a second output buffer coupled to the second charge holding capacitor; and a second row switch coupled between the second output buffer and a second column bus.
16 . The sensor of claim 3 , wherein:
the first and second charge transfer gates are formed of NMOS technology; the first storage node includes a reset gate coupled to the first charge holding capacitor; the second storage node includes a reset gate coupled to the second charge holding capacitor; and the reset gates of the first and second storage nodes are formed of PMOS technology.
17 . The sensor of claim 4 , wherein:
the pixel further includes a reset gate coupled to an input of the output buffer; the reset gate is formed of PMOS technology; and the first and second charge transfer gates are formed of NMOS technology.
18 . The sensor of claim 8 , wherein:
the first storage node includes a first charge holding capacitor and a first charge transfer gate coupled between the first charge holding capacitor and the photo detector; the second storage node includes a second charge holding capacitor and a second charge transfer gate coupled between the second charge holding capacitor and the photo detector; the first and second charge transfer gates are formed of NMOS technology; and the preset gate is formed of PMOS technology.
19 . The sensor of claim 3 , wherein:
the first and second charge transfer gates are formed of PMOS technology; the first storage node includes a reset gate coupled to the first charge holding capacitor; the second storage node includes a reset gate coupled to the second charge holding capacitor; and the reset gates of the first and second storage nodes are formed of NMOS technology.
20 . The sensor of claim 4 , wherein:
the pixel further includes a reset gate coupled to an input of the output buffer; the reset gate is formed of NMOS technology; and
the first and second charge transfer gates are formed of PMOS technology.
21 . The sensor of claim 8 , wherein:
the first storage node includes a first charge holding capacitor and a first charge transfer gate coupled between the first charge holding capacitor and the photo detector; the second storage node includes a second charge holding capacitor and a second charge transfer gate coupled between the second charge holding capacitor and the photo detector; the first and second charge transfer gates are formed of PMOS technology; and the preset gate is formed of NMOS technology.
22 . A method of operating a pixel having a photo detector, a buffer coupled to the photo detector, first and second storage capacitors coupled through respective switches to the buffer, the method comprising:
resetting the photo detector and the first and second capacitors; collecting photo charge produced by light from a first image in the photo detector; transferring the collected photo charge from the photo detector to the first capacitor; resetting the photo detector and the second capacitor; collecting photo charge produced by light from a second image in the photo detector; and transferring the collected photo charge to the second capacitor.
23 . The method of claim 22 , further comprising:
illuminating a scene during the step of collecting photo charge but not illuminating the scene during the step of repeating the step of collecting photo charge; and transferring voltages on the first and second capacitors through a differential analog chain to an on chip analog to digital converter.
24 . A method comprising:
transferring a first collected signal produced by light from a first image from a photo site to a first storage node during a first period; transferring a second collected signal produced by light from a second image from the photo site to a second storage node during a second period that follows the first period; and transferring the first and second collected signals out of the pixel during a third period that follows the second period.
25 . A sensor comprising:
a pixel that includes a first storage node, a second storage node and a photo detector; and control circuitry to transfer a first collected signal produced by light from a first image from the photo detector to the first storage node during a first period, to transfer a second collected signal produced by light from a second image from the photo detector to the second storage node during a second period, and to transfer the first and second collected signals in parallel out of the pixel during a third period that follows the second period.
26 . A sensor according to claim 25 , wherein:
the first storage node includes a first charge holding capacitor and a first charge transfer gate coupled between the first charge holding capacitor and the photo detector; and the second storage node includes a second charge holding capacitor and a second charge transfer gate coupled between the second charge holding capacitor and the photo detector.
27 . A sensor according to claim 25 , wherein:
the first storage node includes a first charge holding capacitor, a first output voltage switch and a first output buffer coupled between the first charge holding capacitor and the first output voltage switch; and the second storage node includes a second charge holding capacitor, a second output voltage switch and a second output buffer coupled between the second charge holding capacitor and the second output voltage switch.
28 . A sensor according to claim 25 , wherein:
the pixel further includes a preset gate coupled to the photo detector; and the control circuitry is coupled to the preset gate to provide the preset gate with a preset signal.
29 . A sensor according to claim 25 , wherein the pixel is one pixel of a two-dimensional array of like pixels.Join the waitlist — get patent alerts
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