Dedicated input/output first in/first out module for a field programmable gate array

Abstract

A field programmable gate array architecture having a plurality of input/output pads. The architecture comprising: a plurality of logic clusters; a plurality of input/output clusters; a plurality of input/output buffers; a plurality of dedicated input/output first-in/first-out memory blocks, the dedicated input/output first-in/first-out memory blocks having a first-in/first-out memory coupled to one of the plurality of input/output pads; an input/output block controller programmably coupled to the plurality of dedicated input/output first-in/first-out memory blocks; and a routing interconnect architecture programmably coupling the logic clusters, input/output buffers and the input/output clusters, wherein the dedicated input/output first-in/first-out memory blocks are programmably coupled between the input/output buffers and the input/output clusters.

1 . A field programmable gate array architecture having a plurality of input/output pads comprising:
 a plurality of logic clusters;   a plurality of input/output clusters;   a plurality of input/output buffers;   a plurality of dedicated input/output first-in/first-out memory blocks, said dedicated input/output first-in/first-out memory blocks having a first-in/first-out memory coupled to one of said plurality of input/output pads;   an input/output block controller programmably coupled to said plurality of dedicated input/output first-in/first-out memory blocks, wherein said input/output block controller comprises a dedicated FIFO flag logic block coupled to said plurality of input/output clusters; and   a routing interconnect architecture programmably coupling said logic clusters, input/output buffers and said input/output clusters,   wherein said dedicated input/output first-in/first-out memory blocks are programmably coupled between said input/output buffers and said input/output clusters.