Method for forming anti-stiction bumps on a micro-electro mechanical structure

Abstract

A technique for forming anti-stiction bumps on a bottom surface of a micro-electro mechanical (MEM) structure includes a number of process steps. The MEM structure is fabricated from an assembly that includes a support substrate bonded to a single-crystal semiconductor layer, via an insulator layer. A plurality of holes are formed through the single-crystal semiconductor layer to the insulator layer on an interior portion of a defined movable structure. A portion of the insulator layer underneath the holes is removed. The holes are then filled with a conformal film that extends below a lower surface of the defined movable structure to provide a plurality of anti-stiction bumps. A trench is then formed through the single-crystal semiconductor layer to the insulator layer to form the defined movable structure. Finally, a remainder of the insulator layer underneath the defined movable structure is removed to free the defined movable structure.

1 . A micro-electro mechanical (MEM) structure, comprising:
 an assembly:   including a support substrate; and   a single-crystal semiconductor layer bonded to the support substrate with an insulator layer, wherein the single-crystal semiconductor layer includes a movable structure that includes a plurality of holes that are filled with a conformal film, and wherein the conformal film extends below a lower surface of the movable structure to provide a plurality of anti-stiction bumps between a surface of the single-crystal semiconductor layer and the support substrate.   
     
     
         2 . The structure of  claim 1 , wherein the conformal film is polysilicon. 
     
     
         3 . The structure of  claim 1 , wherein the holes are formed using a deep reactive ion etch (DRIE). 
     
     
         4 . The structure of  claim 1 , wherein the insulator layer is an oxide layer. 
     
     
         5 . The structure of  claim 1 , wherein the semiconductor is silicon. 
     
     
         6 . The structure of  claim 1 , wherein the support substrate is a single-crystal silicon wafer, the single-crystal semiconductor layer is a single-crystal silicon layer and the insulator layer is an oxide layer.