US2008226223A1PendingUtilityA1
Method of manufacturing a semiconductor device
Est. expiryJul 25, 2023(expired)· nominal 20-yr term from priority
G02F 2202/32H01S 5/1085H01S 5/2004H01S 5/04257H01S 5/32G02B 6/1225H01S 5/04252H01S 5/04256G02F 1/025H01S 5/0424H01S 5/3054G02B 6/12004B82Y 20/00H10H 20/872H01S 5/11
54
PatentIndex Score
0
Cited by
0
References
0
Claims
Abstract
A semiconductor device has a two-dimensional slab photonic crystal structure in which a substrate supports a sheet-like slab layer including, sequentially stacked, a lower cladding layer, an active layer, and an upper cladding layer. A periodic refractive index profile structure, in surfaces of the stacked layers, introduces a linear defect region that serves as a waveguide. A p-type region and an n-type region in the slab layer define a pn junction surface at a predetermined angle with respect to the surfaces of the stacked layers in the slab layer.
Claims
exact text as granted — not AI-modified1 - 36 . (canceled)
37 . A method of manufacturing a semiconductor device comprising:
forming a slab layer on a substrate by sequentially stacking a lower cladding layer, an active layer, and an upper cladding layer as stacked layers; forming a pn junction surface at a predetermined angle with respect to surfaces of the stacked layers in the slab layer; forming an ohmic contact layer for attaching an electrode, on the upper cladding layer; forming a periodic air hole structures introducing a linear defect region serving as a waveguide, on the slab layer and the ohmic contact layer; forming an electrode on the ohmic contact layer in each of a p-type region and an n-type region in the slab layer; removing the ohmic contact layer; and oxidizing an Al-containing layer in a lower portion or in both an upper portion and a lower portion of the slab layer into a dielectric layer, to form a semiconductor slab layer.
38 . The method according to claim 37 , wherein
forming a slab layer includes forming each of the active layer and the upper and lower cladding layers of n-type compound semiconductor materials, and forming the pn junction surface includes diffusing a dopant producing p-type conductivity into a predetermined region of the slab layer.
39 . The method according to claim 37 , wherein
forming a slab layer includes forming each of the active layer and the upper and lower cladding layers of p-type compound semiconductor materials, and forming the pn junction surface includes diffusing a dopant producing n-type conductivity into a predetermined region of the slab layer.
40 . The method according to claim 37 , wherein
forming a pn junction surface includes forming an alignment mark on the slab layer that indicates position of the pn junction, and removing the ohmic contact layer includes removing the ohmic contact layer in a predetermined region based on the alignment mark.
41 . The method according to claim 37 , wherein
forming a pn junction surface includes forming an alignment mark on the slab layer that indicates position of the pn junction, and forming the periodic air hole structure includes matching position of the periodic air hole structure with the alignment mark when forming the periodic air hole structure.
42 . The method according to claim 37 , including forming the pn junction surface before forming the ohmic contact layer.
43 . The method according to claim 37 , including forming the pn junction surface after forming the ohmic contact layer.
44 . The method according to claim 37 , including forming the periodic air hole structure before removing the ohmic contact layer.
45 . The method according to claim 37 , including forming the periodic air hole structure after removing the ohmic contact layer.
46 . A method of manufacturing a semiconductor device comprising:
forming a slab layer on a first substrate by sequentially stacking a lower cladding layer, an active layer, and an upper cladding layer as stacked layers; forming a pn junction surface at a predetermined angle with respect to surfaces of the stacked layers in the slab layer; forming a periodic air hole structure introducing a linear defect region serving as a waveguide, on the slab layer; removing a lower portion or an upper portion and a lower portion of the slab layer, to form a semiconductor slab layer; fusing a second substrate, prepared separately from the first substrate, to the first substrate; and forming an electrode in a p-type region and an n-type region on the second substrate that has been fused to the first substrate.
47 . The method according to claim 46 , further comprising:
forming an ohmic contact layer for attaching the electrode, on the upper cladding layer, and forming the pn junction surface before forming the ohmic contact layer.
48 . The method according to claim 46 , further comprising forming an ohmic contact layer for attaching the electrode, on the upper cladding layer, and
forming the pn junction surface after forming the ohmic contact layer.
49 . The method according to claim 46 , further comprising
forming an ohmic contact layer for attaching the electrode, on the upper cladding layer, and forming the periodic air hole structure before removing the ohmic contact layer.
50 . The method according to claim 46 , further comprising
forming an ohmic contact layer for attaching the electrode, on the upper cladding layer, and forming the periodic air hole structure after removing the ohmic contact layer.
51 . The method according to claim 46 , further comprising forming an ohmic contact layer for attaching the electrode, on a lower portion of the lower cladding layer.
52 . A method of manufacturing a semiconductor device comprising:
forming a slab layer on a substrate by sequentially stacking a lower cladding layer, an active layer, and an upper cladding layer as stacked layers; forming an ohmic contact layer for attaching an electrode, on the upper cladding layer; forming a periodic air hole structure introducing a linear defect region serving as a waveguide, on the slab layer and the ohmic contact layer; forming a pn junction surface at a predetermined angle with respect to surfaces of the stacked layers in the slab layer; forming an electrode on the ohmic contact layer in each of a p-type region and an n-type region in the slab layer; removing the ohmic contact layer; and removing an interior portion of the substrate, so the substrate is hollow, to form the sheet-like slab layer.
53 . The method according to claim 52 , including forming the periodic air hole structure before removing the ohmic contact layer.
54 . The method according to claim 52 , including forming the periodic air hole structure after removing the ohmic contact layer.Join the waitlist — get patent alerts
Track US2008226223A1 — get alerts on status changes and closely related new filings.
We store only your email — no account needed. See our privacy policy.