Manufacturing method of anti-punch-through semiconductor device

Abstract

An anti-punch-through semiconductor device is provided. The anti-punch-through semiconductor device includes a substrate, at least an isolation region and a plurality of trench devices. The trench device is disposed in the substrate. The trench device includes a source/drain region. The source/drain region of the trench device is disposed at the bottom of the trench device. The isolation region is disposed in the substrate and between the source/drain regions of each trench device.

1 . A manufacturing method of anti-punch-through semiconductor device, comprising:
 providing a substrate;   forming an insulation layer on the substrate;   patterning the insulation layer to form a plurality of isolation regions;   forming a silicon layer on the substrate to cover the isolation regions;   forming a plurality of trenches between each adjacent isolation region; and   forming a trench device in each trench, wherein the trench device further comprises a source/drain region formed in the silicon layer under the trench and disposed between two adjacent isolation regions.   
   
   
       2 . The method of  claim 1 , wherein the material of the insulation layer comprises silicon oxide. 
   
   
       3 . The method of  claim 1 , wherein the thickness of the insulation layer is about 100 Å-1000 Å. 
   
   
       4 . The method of  claim 1 , wherein the shape of the isolation region includes blocks or parallel stripes. 
   
   
       5 . The method of  claim 1 , wherein the method of forming the source/drain region comprises an ion-implanting method. 
   
   
       6 . The method of  claim 1 , wherein the trench device includes trench memory. 
   
   
       7 . The method of  claim 6 , further comprising:
 forming a dielectric layer on the silicon layer to cover the trench memory after the trench memory is formed; and   forming a conductive layer on the dielectric layer.