US2008211548A1PendingUtilityA1
Semiconductor integrated circuit controlling output impedance and slew rate
Est. expiryApr 23, 2023(expired)· nominal 20-yr term from priority
H03K 19/00384H03K 17/164H03K 19/018585E03C 1/14H03K 19/0005H03K 17/163H03K 19/018557A47K 1/08
44
PatentIndex Score
0
Cited by
0
References
0
Claims
Abstract
The present invention provides a semiconductor integrated circuit that can perform impedance control and slew rate control independently of each other and simplify the structure of a control circuit. An output circuit comprising plural output MOSFETs connected in parallel is used, from among the plural output MOSFETs, the number of output MOSFETS to be turned on is selected by a first control means to control output impedance, and slew rate is controlled by a second control means controlling a drive signal of the output MOSFETs to be turned on.
Claims
exact text as granted — not AI-modified1 . A semiconductor integrated circuit comprising:
an output circuit which includes plural output MOSFETs connected in parallel and whose output node is connected to an external terminal; a first control means that selects the number of the plural output MOSFETs to be turned on to control output impedance; a second control means that controls slew rate by controlling a drive signal of the plural output MOSFETs to be turned on; an input circuit that receives input signals supplied from the external terminal; a terminal circuit including plural output MOSFETs connected in parallel; and a third control means that controls the number of the plural output MOSFETs to be turned on to control a resistance value of terminal resistance.
2 . The semiconductor integrated circuit according to claim 1 ,
wherein the third control means turns off all plural output MOSFETs controlled by the output circuit when brought into operation.
3 . The semiconductor integrated circuit according to claim 2 ,
wherein the output MOSFET comprises a first MOSFET of a first conduction type that forms an output signal of a level corresponding to a power voltage side, and a second MOSFET of a second conduction type that forms an output signal of a level corresponding to ground potential side of the circuit, and a resistance element is connected in series with each of the first MOSFET and the second MOSFET, and the MOSFETs making up the terminal circuit include a third MOSFET of the first conduction type disposed at power voltage side and a fourth MOSFET of the second conduction type disposed at ground potential side of the circuit.
4 . The semiconductor integrated circuit according to claim 3 ,
wherein the first MOSFET, the second MOSFET, and the resistance element, and the third MOSFET and the fourth MOSFET can be connected by one straight wiring to form a layout of a basic structure, and two or more of the basic structures comprising the first MOSFET, the second MOSFET, and the resistance element, and the third MOSFET and the fourth MOSFET are disposed in parallel in a stripe form in a direction orthogonal to the wiring.
5 . The semiconductor integrated circuit according to claim 4 ,
wherein the first control means includes a first resistance element connected to a first external element, and forms a signal for selecting the plural first MOSFETs and second MOSFETs so as to produce an output impedance closest to a resistance value of the first resistance element connected to the first external terminal, and the third control means includes a second resistance element connected to a second external terminal and forms a signal for selecting the plural third MOSFETs and fourth MOSFETs so as to produce output impedance closest to a resistance value of the second resistance element connected to the second external terminal.Join the waitlist — get patent alerts
Track US2008211548A1 — get alerts on status changes and closely related new filings.
We store only your email — no account needed. See our privacy policy.