Input buffer with wide input voltage range

Abstract

The input buffer is driven by a data input/output supply voltage. The input buffer generates an output signal from an input signal that swings between the data input/output supply voltage and a data input/output ground voltage.

1 . An input buffer comprising:
 a buffer circuit connected between a supply voltage and a ground voltage, the buffer circuit receiving an input signal and generating an output signal; and   a control circuit receiving the input signal and generating the supply voltage based on the input signal such that the supply voltage is greater than or equal to the input signal.   
   
   
       2 . The input buffer of  claim 1 , wherein the control circuit compares the input signal with the supply voltage and generates the supply voltage based on the comparison. 
   
   
       3 . The input buffer of  claim 2 , wherein the control circuit comprises:
 a comparison circuit comparing the input signal with the supply voltage;   a capacitor supplying the supply voltage; and   a charging circuit that charges the capacitor based on output of the comparison circuit.   
   
   
       4 . The input buffer of  claim 1 , wherein the buffer circuit comprises:
 an inverter connected between the supply voltage and the ground voltage, the inverter inverting the input signal to generate the output signal.   
   
   
       5 . The input buffer of  claim 4 , wherein the inverter comprises:
 a PMOS transistor having a source connected to the supply voltage, a gate receiving the input signal, and a drain; and   an NMOS transistor having a source connected to the ground voltage, a gate receiving the input signal, and a drain connected to the drain of the PMOS transistor, and the connection of the drains of the PMOS and NMOS transistors producing the output signal.