Auto-precharge control circuit in semiconductor memory and method thereof

Abstract

An auto-precharge control circuit in a semiconductor memory and method thereof, where the auto-precharge starting point may vary. The auto-precharge starting point may vary in response to at least one control signal. The auto-precharge starting point may vary in accordance with frequency and/or latency information. The auto-precharge starting point may vary in response to at least one control signal including clock frequency information. The auto-precharge starting point may vary depending on a latency signal received from a mode register setting command. The auto-precharge control circuit may include a control circuit for receiving a write signal, a clock signal and at least one control signal, including at least one of clock frequency information and latency information, and outputting at least one path signal; an auto-precharge pulse signal driver for receiving the at least one path signal, the write signal, and an enable signal and producing an auto-precharge pulse signal, the auto-precharge pulse signal identifying a starting point for an auto-precharge operation; and an auto-precharge mode enabling circuit for receiving the clock signal, an auto-precharge command, an active signal, and the auto-precharge pulse signal and generating the enable signal.

1 . An auto-precharge control circuit for varying a write recovery time of a semiconductor device in response to at least one control signal including clock frequency information. 
   
   
       2 .- 46 . (canceled)