US2008203504A1PendingUtilityA1

Magneto-resistance transistor and method thereof

Assignee: IND TECH RES INSTPriority: Sep 16, 2004Filed: Apr 14, 2008Published: Aug 28, 2008
Est. expirySep 16, 2024(expired)· nominal 20-yr term from priority
G11C 11/15G11C 11/161G11C 11/16H10D 48/40H10N 50/10
39
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Claims

Abstract

A magneto-resistance transistor including a magneto-resistant element which may function as an emitter and a passive element which may function as a collector. The base may be interposed between the passive element and the magneto-resistant element, thereby coupling the passive element with the magneto-resistant element. A magnetic field of a given strength may be applied to at least a portion of the magneto-resistant transistor, the given strength determining a resistance in the at least a portion of the magneto-resistant transistor. Thus, by adjusting the given strength of the magnetic field, the resistance may be adjusted. Therefore, different emitter current inputs may be achieved with a fixed voltage. Further, a base current may vary with a controlled variation of the emitter current input.

Claims

exact text as granted — not AI-modified
1 . A magneto-resistance transistor having emitter, base, and collector terminals, comprising:
 a magneto-resistant element which includes an adjustable resistance having a resistance value that is based on the strength of a magnetic field, the magneto-resistant element comprising a first layer that is connected to the emitter terminal and a second layer that is connected to the base terminal; and   a passive element adjacent the second layer the passive element being connected to the collector terminal,   wherein the second layer of the magneto-resistant element is disposed between the first layer and the passive element.   
   
   
       2 . The magneto-resistance transistor of  claim 1 , wherein at least one of the first and second layers is a magnetic layer. 
   
   
       3 . The magneto-resistance transistor of  claim 1 , wherein the magneto-resistant element includes at least one of a tunnel magneto-resistant element, a spin valve magneto-resistant element, and a giant magneto-resistant element. 
   
   
       4 . The magneto-resistance transistor of  claim 1 , wherein the passive element includes at least one of a diode and a resistor. 
   
   
       5 . The magneto-resistance transistor of  claim 1 , wherein the passive layer includes a diode selected from the group consisting of a p-n junction diode, a p-i-n diode, a Schottky-barrier diode, a planar-doped-barrier diode, tunnel diode, a resonant-tunneling diode, a resonant-interband-tunneling diode, a single-barrier tunnel diode, a single-barrier interband-tunneling diode, a real-space-transfer diode, a heterostructure hot-electron diode, an impact-ionization-avalanche transit-time diode, a barrier-injection transit-time diode, a p-i-n photodiode, a Schottky-barrier photodiode and an avalanche photodiode. 
   
   
       6 . The magneto-resistance transistor of  claim 1 , further comprising an ohmic contact layer. 
   
   
       7 . The magneto-resistance transistor of  claim 6 , wherein the ohmic contact layer is connected to the collector terminal. 
   
   
       8 . The magneto-resistance transistor of  claim 1 , wherein at least one of the magneto-resistant element and the passive element is formed on a substrate. 
   
   
       9 . The magneto-resistance transistor of  claim 1 , wherein the magneto-resistant element and the passive element are formed on a same plane of a substrate. 
   
   
       10 . The magneto-resistance transistor of  claim 1 , wherein the magneto-resistant element and the passive element are stacked on a substrate. 
   
   
       11 . The magneto-resistance transistor of  claim 8 , wherein the substrate is a semiconductor substrate. 
   
   
       12 . The magneto-resistance transistor of  claim 11 , wherein the semiconductor substrate is a silicon substrate. 
   
   
       13 . The magneto-resistance transistor of  claim 11 , wherein the semiconductor substrate is a GaAs substrate. 
   
   
       14 . The magneto-resistance transistor of  claim 8 , wherein the substrate is a glass substrate. 
   
   
       15 . The magneto-resistance transistor of  claim 8 , wherein the substrate includes plastic. 
   
   
       16 . The magneto-resistance transistor of  claim 1 , wherein passive element includes a second magneto-resistant element. 
   
   
       17 . The magneto-resistance transistor of  claim 1 , wherein the passive element includes a second adjustable resistance, the second adjustable resistance having a resistance value that is based on the magnetic field. 
   
   
       18 . The magneto-resistance transistor of  claim 1 , wherein at least one magnetic film is coated on the passive element. 
   
   
       19 - 36 . (canceled) 
   
   
       37 . A magneto-resistance transistor having emitter base and collector terminals, comprising:
 a magneto-resistant element which includes an adjustable resistance having a resistance value that based on the strength of a magnetic field, the magneto-resistant element being connected to the emitter terminal:   a passive element connected to the collector terminal:   an insulating layer sandwiched between the magneto-resistant element and the passive element; and   a base element for coupling the magneto-resistant element and the passive element, the base element contacting the magneto-resistant element and the base element and being connected to the base terminal.   
   
   
       38 - 40 . (canceled) 
   
   
       41 . The magneto-resistance transistor of  claim 1 , wherein the magneto-resistant element and the passive element are formed with a semiconductor manufacturing process and are integrally formed on a substrate. 
   
   
       42 . The magneto-resistance transistor of  claim 1 , wherein the first layer is a first ferromagnetic layer, wherein the second layer is a second ferromagnetic layer, and wherein the magneto-resistant element further comprises an insulating layer disposed between the first and second ferromagnetic layers.

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