Manufacturing method for a nanocrystal based device covered with a layer of nitride deposited by cvd

Abstract

The invention relates to a manufacturing method for a structure comprising semi-conductor material nanocrystals on a dielectric material substrate by chemical vapour deposition (CVD), the nanocrystals being covered by a layer of semi-conductor material nitride. The method comprises a step for forming stable nuclei on the substrate by CVD from a first gaseous precursor of the nuclei; a step of nanocrystal growth from stable nuclei by CVD from a second gaseous precursor; and a step for forming a layer of semi-conductor material nitride on the nanocrystals. The method is characterised in that the passivation step is carried out by selective and stoichiometric CVD of semi-conductor material nitride only on the nanocrystals from a mixture of the second and a third gaseous precursor selected to cause selective and stoichiometric deposition of the nitride only on said nanocrystals, wherein steps for forming the nuclei, forming the nanocrystals and passivation are carried out inside a same, single chamber. The invention also relates to the formation of memory cells and flash memories comprising nanocrystals made according to the method of the invention.

1 . Manufacturing method of a structure comprising semi-conductor material nanocrystals on a dielectric material substrate by chemical vapour deposition (CVD), the nanocrystals being covered with a layer of semi-conductor material nitride, said method comprising:
 a germination step by formation on the dielectric material substrate ( 12 ) of stable nuclei ( 14 ) in the form of islands, by CVD from a first gaseous precursor ( 11 ) of nuclei selected so that the dielectric material ( 12 ) accepts the formation of said nuclei ( 14 ),   a growth step by formation of semi-conductor material nanocrystals ( 16 A,  16 B) from stable nuclei ( 14 ), by CVD from a second gaseous precursor ( 21 ) selected so as to cause a selective deposition of said nanocrystal semi-conductor material only on said nuclei ( 14 ),   a passivation step by formation of a layer of semi-conductor material nitride on the semi-conductor material nanocrystals,   wherein said method is characterised in that the passivation step is carried out by selective and stoichiometric CVD deposition of the semi-conductor material nitride ( 17 ) only on the semi-conductor material nanocrystals from a mixture ( 31 ) of the second gaseous precursor with a third gaseous precursor selected so that the mixture ( 31 ) is capable of causing a selective and stoichiometric deposition of the semi-conductor material nitride only on said semi-conductor material nanocrystals, the steps for forming the nuclei, for forming the nanocrystals and the passivation being carried out inside a same, single chamber.   
     
     
         2 . Method according to  claim 1 , wherein the first gaseous precursor, the second gaseous precursor and the mixture of the second gaseous precursor with the third gaseous precursor are sent into the chamber in a continuous flow. 
     
     
         3 . Method according to  claim 1 , further comprising a preparatory step of the surface of the dielectric material substrate ( 12 ), prior to the germination step, by chemical attack of said surface via HF, HF-RCA or RCA, so as to form —OH groups on the surface of said dielectric material substrate ( 12 ) and favour the formation of the nuclei ( 14 ). 
     
     
         4 . Method according to  claim 1 , wherein the dielectric material substrate ( 12 ) is selected from the group composed of a silicon thermal oxide, a silicon thermal oxide comprising a high density of Si—OH groups at its surface or a “high-K” material such as HfO 2 , Al 2 O 3 , a hafnium aluminate or a hafnium silicate. 
     
     
         5 . Method according to  claim 1 , wherein the semi-conductor material of the nanocrystals and/or of the nitride layer is selected from silicon, germanium and silicon-germanium SiGe. 
     
     
         6 . Method according to  claim 5 , wherein the nanocrystals being made of silicon, the layer covering said nanocrystals is made of silicon nitride or germanium nitride. 
     
     
         7 . Method according to  claim 5 , wherein the nanocrystals being made of germanium, the layer covering said nanocrystals is made of silicon nitride. 
     
     
         8 . Method according to  claim 1 , wherein the germination step is carried out at a deposition temperature and during an exposure time to the first gaseous precursor selected so as to obtain a nuclei density of nuclei greater than or equal to 10 10  nuclei per cm 2  and nuclei with a size less than or equal to 10 nm. 
     
     
         9 . Method according to  claim 1 , wherein the growth step of the nanocrystals ( 16 A) is carried out at a deposition temperature, for an exposure time to the second gaseous precursor and at a partial pressure of the second gaseous precursor selected according to the desired size of the nanocrystals ( 16 B). 
     
     
         10 . Method according to  claim 1 , wherein the first gaseous precursor ( 11 ) is selected from silane, disilane or trisilane. 
     
     
         11 . Method according to  claim 1 , wherein the second gaseous precursor ( 21 ) is selected from germanium (GeH 4 ), dichlorosilane (SiH 2 Cl 2 ) or a mixture of these two gases. 
     
     
         12 . Method according to  claim 10  and  11  considered together, wherein the first and second gaseous precursors are respectively silane and dichlorosilane, the temperature and the deposition time of the growth step being greater than the temperature and the deposition time of the germination step. 
     
     
         13 . Method according to  claim 11  or  12 , wherein the third gaseous precursor is ammoniac (NH 3 ). 
     
     
         14 . Method according to  claim 1 , wherein the dielectric material substrate ( 12 ) being a thermal silicon oxide, the passivation step is carried out during a deposition time of the gas, formed by a mixture of the second gaseous precursor and the third gaseous precursor, of less than 8 minutes. 
     
     
         15 . Memory cell having a floating gate, wherein the floating gate is formed by nano-structures obtained according to  claim 1 . 
     
     
         16 . Flash memory comprising at least one memory cell as claimed in  claim 15 .