Reduced emi device and method thereof

Abstract

A method and system are disclosed for spreading the power associated with digital signals being transmitted to reduce electromagnetic interference (EMI) emissions by receiving, via a first transmission line, a first power spread signal representative a first digital signal modified using a first power spreading digital noise signal, modifying the power spread signal using a second power spreading digital noise signal substantially similar to the first power spreading digital noise signal to generate a second digital signal substantially similar to the first digital signal, modifying the second digital signal using a third power spreading digital noise signal to generate a second power spread signal and providing the second power spread signal for output to a second transmission line.

1 . A circuit device comprising:
 a circuit substrate;   a transmission line disposed at the circuit substrate;   a transmitter disposed at the circuit substrate and comprising:
 a first noise source comprising an output to provide a first power spreading digital noise signal; and 
 an encoder comprising a first input operably coupled to the output of the first noise source, a second input to receive a first digital signal and an output operably coupled to the transmission line to provide a second digital signal, wherein the encoder is operable to modify the first digital signal using the first power spreading digital noise signal to generate the second digital signal; and 
   a receiver disposed at the circuit substrate and comprising:
 a second noise source separate from the first noise source, the second noise source comprising an output to provide a second power spreading digital noise signal; and 
 a decoder comprising a first input operably coupled to the output of the second noise source, a second input operably coupled to the transmission line to receive the second digital signal and an output to provide a third digital signal, wherein the decoder is operable to modify the second digital signal using the second power spreading digital noise signal to generate the third digital signal, wherein the third digital signal is representative of the first digital signal. 
   
   
   
       2 . The circuit device of  claim 1 , wherein the circuit substrate comprises a printed circuit board. 
   
   
       3 . The circuit device of  claim 2 , wherein the transmitter is integrated into a first integrated circuit device and the receiver is integrated into a second integrated circuit device separate from the first integrated circuit device. 
   
   
       4 . The circuit device of  claim 1 , wherein the circuit substrate comprises an integrated circuit substrate. 
   
   
       5 . A device comprising:
 a plurality of delay paths, each delay path comprising an input to receive a first digital signal and a different number of delay cells with respect to the other delay paths of the plurality of delay paths;   a pseudo-random number generator comprising an output; and   a multiplexer comprising a control input, a plurality of signal inputs, and an output, wherein each signal input is operably coupled to a corresponding delay path of the plurality of delay paths and the multiplexer is operable to select a signal received via one of the plurality of signal inputs for provision to the output based on the control input.   
   
   
       6 . The device of  claim 5 , wherein the digital signal comprises a digital clock signal. 
   
   
       7 . The device of  claim 5 , wherein the delay cells comprise an inverter operably coupled to a capacitor. 
   
   
       8 . The device of  claim 7 , further comprising a noise generator operably coupled to the delay cells, wherein the noise generator is operable to activate the delay cells. 
   
   
       9 . A method comprising:
 receiving a first digital signal representing a second digital signal modified by a first power spreading signal; and   modifying the first digital signal based on a second power spreading signal implementing the first power spreading function to produce a third digital signal in response to a control stimulus, wherein the third digital signal is representative of the second digital signal.   
   
   
       10 . The method of  claim 9 , further comprising:
 determining if the third digital signal is a representation of the second digital signal.   
   
   
       11 . The method of  claim 10 , further comprising:
 providing the third digital signal to a clock distribution network when the third digital signal is determined to be a representation of the second digital signal.   
   
   
       12 . The method of  claim 10 , further comprising:
 preventing distribution of the third digital signal to a clock distribution network when the third digital signal is determined to not be a representation of the second digital signal.   
   
   
       13 . The method of  claim 9 , wherein receiving the first digital signal comprises receiving the first digital signal via a transmission line. 
   
   
       14 . A system comprising:
 a first input to receive a first representation of a digital signal, wherein the first representation of the digital signal has its power spread relative to the digital signal based on a first power spreading signal; and   a decoding module comprising a second input coupled to the first input, a third input, and a first output to provide a second representation of the digital signal in response to a control stimulus received at the third input, wherein the second representation represents the first representation of the digital signal modified by a second power spreading signal substantially equivalent to the first power spreading signal.   
   
   
       15 . The system of  claim 14 , further comprising a clock distribution network having an input operably coupled to the output of the decoding module to distribute the second representation of the digital signal.