Barrier for use in 3-d integration of circuits

Abstract

A method for forming a semiconductor device includes providing a first integrated circuit having a landing pad and attaching a second integrated circuit to the first integrated circuit using at least one bonding layer. The second integrated circuit has an inter-circuit trace, the inter-circuit trace has an inter-circuit trace opening. The method further includes forming an opening through the second integrated circuit, the opening extending through the inter-circuit trace opening, forming a selective barrier on exposed portions of the inter-circuit trace in the opening, extending the opening through the at least one bonding layer to the landing pad, and filling the opening with a conductive fill material. The selective barrier layer comprises at least one of cobalt or nickel, and the conductive fill material electrically connects the inter-circuit trace and the landing pad.

1 - 17 . (canceled) 
     
     
         18 . A semiconductor device, comprising:
 a first integrated circuit having a landing feature and at least one bonding layer over the landing feature;   a second integrated circuit having an inter-circuit trace and at least one bonding layer over the inter-circuit trace, wherein the at least one bonding layer of the second integrated circuit is attached to the at least one bonding layer of the first integrated circuit;   a conductive interconnect extending through the second integrated circuit, through an opening in the inter-circuit trace, through the at least one bonding layer of the second integrated circuit, and through the at least one bonding layer of the first integrated circuit to the landing feature, the conductive interconnect electrically connecting the inter-circuit trace to the landing feature; and   a barrier layer adjacent the inter-circuit trace comprising at least one material selected from a group consisting of cobalt and nickel and located in the opening of the inter-circuit trace, between the inter-circuit trace and the conductive interconnect.   
     
     
         19 . The semiconductor device of  claim 18 , further comprising:
 a dielectric material at least partially surrounding the inter-circuit trace; and   a second barrier layer adjacent the inter-circuit trace, wherein the second barrier layer is conductive and different from the first barrier layer, and the second layer is located between the dielectric material and the inter-circuit trace.   
     
     
         20 . The semiconductor device of  claim 18 , further comprising a second barrier layer adjacent the landing feature and located between the landing feature and the conductive interconnect, wherein the landing feature comprises at least one material selected from a group consisting of cobalt and nickel.