Power Semiconductor Devices with Barrier Layer to Reduce Substrate Up-Diffusion and Methods of Manufacture
Abstract
A method for controlling the thickness of an expitaxially grown semiconductor material includes providing a semiconductor substrate that is doped by dopants of a first type; forming a buffer layer atop the semiconductor substrate, the buffer layer being doped with dopants of a second type that has much less diffusivity relative to that of dopants of the first type and forming the expitaxially grown layer atop the buffer layer to a desired thickness. The buffer layer, which acts to counter an up-diffusion of the dopants of the first type from the substrate into the epitaxially grown layer, can be doped with arsenic or carbon or both arsenic and carbon. A semiconductor device includes the buffer layer to counter an up-diffusion of the dopants of the first type from the substrate into the epitaxially grown layer.
Claims
exact text as granted — not AI-modified1 - 180 . (canceled)
181 . A method for controlling the thickness of an expitaxially grown semiconductor material, comprising:
providing a semiconductor substrate that is doped by dopants of a first type; forming a buffer layer atop said semiconductor substrate, the buffer layer being doped with dopants of a second type that has much less diffusivity relative to that of dopants of the first type; and forming the expitaxially grown layer atop said buffer layer to a desired thickness.
182 . The method of claim 181 wherein the buffer layer is doped with Arsenic.
183 . A method for controlling the thickness of an expitaxially grown semiconductor material, comprising:
providing a semiconductor substrate that is doped by dopants of a first type; forming a barrier layer atop said semiconductor substrate, the barrier layer having a composition including carbon; and forming the expitaxially grown layer atop said buffer layer to a desired thickness, wherein, the barrier layer acts to counter an up-diffusion of the dopants of the first type from the substrate into the epitaxially grown layer.
184 . The method of claim 183 wherein the step of forming the barrier layer comprises growing a layer of silicon carbide.
185 . The method of claim 183 wherein the step of forming the barrier layer comprises implanting carbon dopants into a surface of the semiconductor substrate.
186 . A method for controlling the thickness of an expitaxially grown semiconductor material, comprising:
providing a semiconductor substrate that is doped by dopants of a first type; forming the expitaxially grown layer atop said semiconductor substrate to a desired thickness; forming a well region inside the epitaxially grown layer, the well region having dopants of a second type that have opposite conductivity to the dopants of the first type; and forming a diffusion barrier layer at a junction between the expitaxially grown layer and the well region, wherein, the barrier layer acts to counter diffusion dopants between the well region and the epitaxially grown layer.
187 . The method of claim 186 wherein the step of forming a diffusion barrier layer comprises implanting carbon atoms through a window defining the well region.
188 - 235 . (canceled)
236 . The method of claim 182 wherein the buffer layer is further doped with carbon.
237 . The method of claim 181 wherein the buffer layer is doped with both arsenic and carbon.
238 . The method of claim 181 wherein the buffer layer is formed directly on top of the semiconductor substrate.
239 . The method of claim 181 wherein the epitaxially grown layer is formed directly on top of the buffer layer.
240 . A method for controlling the thickness of an expitaxially grown semiconductor material, comprising:
providing a semiconductor substrate that is doped by dopants of a first type; forming a barrier layer atop said semiconductor substrate, the barrier layer having a composition including carbon and arsenic; and forming the expitaxially grown layer atop said barrier layer to a desired thickness, wherein, the barrier layer acts to counter an up-diffusion of the dopants of the first type from the substrate into the epitaxially grown layer.
241 . The method of claim 240 wherein the step of forming the barrier layer comprises growing a layer of silicon carbide.
242 . The method of claim 240 wherein the step of forming the barrier layer comprises implanting carbon and arsenic dopants into a surface of the semiconductor substrate
243 . The method of claim 240 wherein the barrier layer is formed directly on top of the semiconductor substrate.
244 . The method of claim 240 wherein the epitaxially grown layer is formed directly on top of the barrier layer.
245 . A method for controlling the thickness of an expitaxially grown semiconductor material, comprising:
providing a semiconductor substrate that is doped by dopants of a first type; forming a first layer atop said semiconductor substrate, the first layer having a composition including carbon; doping the first layer with arsenic to form a barrier layer; and forming the expitaxially grown layer atop the barrier layer to a desired thickness, wherein, the barrier layer acts to counter an up-diffusion of the dopants of the first type from the substrate into the epitaxially grown layer.
246 . The method of claim 245 wherein the step of forming the first layer atop said semiconductor substrate comprises growing a layer of silicon carbide.
247 . The method of claim 245 wherein the first layer is formed directly on top of the semiconductor substrate.
248 . The method of claim 245 wherein the epitaxially grown layer is formed directly on top of the first layer.
249 . A method of making semiconductor device comprising:
providing a semiconductor substrate that is doped by dopants of a first type; forming a buffer layer atop said semiconductor substrate, the buffer layer being doped with dopants of a second type that has much less diffusivity relative to that of dopants of the first type; forming a drift region of a first conductivity type and a desired thickness atop said buffer layer; forming a well region having a second conductivity type opposite the first conductivity type and extending above the drift region; forming an active trench extending through the well region and into the drift region, the active trench having its sidewalls and bottom lined with dielectric material, and substantially filled with a first conductive layer and a second conductive layer, the second conductive layer forming a gate electrode and being disposed above the first conductive layer and separated therefrom by inter-electrode dielectric material; and forming source regions having the first conductivity type formed in the well region adjacent the active trench.
250 . The method of claim 249 wherein the buffer layer is doped with arsenic.
251 . The method of claim 249 wherein the buffer layer is further doped with carbon.
252 . The method of claim 249 wherein the buffer layer is doped with both arsenic and carbon.
253 . The method of claim 249 wherein the buffer layer is formed directly on top of the semiconductor substrate.
254 . The method of claim 249 wherein the drift region is formed directly on top of the buffer layer.
255 . The method of claim 249 further comprising forming a charge control trench extending deeper into the drift region than the active trench and substantially filled with material to allow for vertical charge control in the drift region.
256 . A semiconductor device comprising:
a semiconductor substrate that is doped by dopants of a first type; a buffer layer formed atop said semiconductor substrate, the buffer layer being doped with dopants of a second type that has much less diffusivity relative to that of dopants of the first type; a drift region of a first conductivity type and a desired thickness atop said buffer layer; a well region extending above the drift region and having a second conductivity type opposite the first conductivity type; an active trench extending through the well region and into the drift region, the active trench having its sidewalls and bottom lined with dielectric material, and substantially filled with a first conductive layer and a second conductive layer, the second conductive layer forming a gate electrode and being disposed above the first conductive layer and separated therefrom by inter-electrode dielectric material; and source regions having the first conductivity type formed in the well region adjacent the active trench.
257 . The semiconductor device of claim 256 wherein the buffer layer is doped with arsenic.
258 . The semiconductor device of claim 256 wherein the buffer layer is further doped with carbon.
259 . The semiconductor device of claim 256 wherein the buffer layer is doped with both arsenic and carbon.
260 . The semiconductor device of claim 256 wherein the buffer layer is formed directly on top of the semiconductor substrate.
261 . The semiconductor device of claim 256 wherein the drift region is formed directly on top of the buffer layer.
262 . The semiconductor device of claim 256 further comprising a charge control trench extending deeper into the drift region than the active trench and substantially filled with material to allow for vertical charge control in the drift region.Join the waitlist — get patent alerts
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