US2008194183A1PendingUtilityA1
Planarization polishing method and method for manufacturing semiconductor device
Est. expiryFeb 8, 2027(~0.5 yrs left)· nominal 20-yr term from priority
Inventors:Mika Fujii
H10P 95/062F16B 37/04H02G 3/0456H02G 3/30F16B 17/006H02G 3/0406B24B 37/044C09G 1/02
47
PatentIndex Score
0
Cited by
0
References
0
Claims
Abstract
Disclosed herein is a planarization polishing method for polishing a polishing-target wafer for a planarized surface, the method including the step of polishing a polishing-target surface into a planarized surface by using polishing slurry that contains an abrasive grain and a surfactant encapsulated through surface coating.
Claims
exact text as granted — not AI-modified1 . A planarization polishing method for polishing a polishing-target wafer for a planarized surface, the method comprising the step of
polishing a polishing-target surface into a planarized surface by using polishing slurry that contains an abrasive grain and a surfactant encapsulated through surface coating.
2 . The planarization polishing method according to claim 1 , wherein
the polishing-target surface is an oxide film.
3 . The planarization polishing method according to claim 2 , wherein
ceria-based polishing slurry that contains a ceria particle as the abrasive grain is used.
4 . The planarization polishing method according to claim 2 , wherein
the surfactant acts on the oxide film that is to be polished.
5 . The planarization polishing method according to claim 2 , wherein
the oxide film is a silicon oxide film formed across a trench in a substrate and an underlying silicon nitride film outside the trench, and the surfactant acts on the silicon oxide film.
6 . The planarization polishing method according to claim 2 , wherein
polishing is carried out by using first polishing slurry that contains an abrasive grain and a surfactant encapsulated through surface coating until a projection region on a polishing-target surface is planarized, and subsequent polishing is carried out by using second polishing slurry that contains no surfactant.
7 . The planarization polishing method according to claim 1 , wherein
mechanical strength of a coating film of the encapsulated surfactant is equal to or lower than mechanical strength by polishing pressure and shear force.
8 . A method for manufacturing a semiconductor device, the method comprising the step of
for formation of a shallow trench isolation region serving as an element isolation region, polishing an oxide film deposited on a region other than a trench of a semiconductor substrate for a planarized surface by using polishing slurry that contains an abrasive grain and a surfactant encapsulated through surface coating.
9 . The method for manufacturing a semiconductor device according to claim 8 , wherein
the oxide film on the region other than the trench is deposited on an underlying film formed of a nitride film.
10 . The planarization polishing method according to claim 8 , wherein
ceria-based polishing slurry that contains a ceria particle as the abrasive grain is used.
11 . The planarization polishing method according to claim 8 , wherein
the surfactant acts on the oxide film that is to be polished.
12 . The method for manufacturing a semiconductor device according to claim 8 , wherein
polishing is carried out by using first polishing slurry that contains an abrasive grain and a surfactant encapsulated through surface coating until a projection region of the oxide film is planarized, and subsequent polishing is carried out by using second polishing slurry that contains no surfactant.
13 . The method for manufacturing a semiconductor device according to claim 8 , wherein
mechanical strength of a coating film of the encapsulated surfactant is equal to or lower than mechanical strength by polishing pressure and shear force.Join the waitlist — get patent alerts
Track US2008194183A1 — get alerts on status changes and closely related new filings.
We store only your email — no account needed. See our privacy policy.