System and apparatus for improving logical built-in self test (lbist) ac fault isolations

Abstract

A system, apparatus and method of isolating a plurality of limiting logical cones in a chip during a logical built-in self test (LBIST) are provided. An LBIST is performed on the chip in order to locate a first latch that fails the test. Particularly, latches on the chip are arranged in a plurality of scan chains wherein each latch holds data for a logical cone. The LBIST is performed on one scan chain at a time. Once the first latch is located, a first limiting cone (i.e., the cone for which the first latch is holding data) may be isolated. After isolating the first limiting cone, the data from the first latch is masked out and the LBIST is repeated on the scan chain. The data is masked out in order to facilitate the identification of any other latch that may fail the test. Again, if another latch fails the test a corresponding limiting cone may be isolated.

1 - 7 . (canceled) 
   
   
       8 . An apparatus for isolating a plurality of limiting logical cones in a chip during a logical built-in self test (LBIST), the chip having a plurality of latches for holding data for a plurality of logical cones, the latches being arranged in a plurality of scan chains, the apparatus comprising:
 a first mask controller for masking the plurality of scan chains while leaving one of the plurality of scan chains unmasked;   a processor for running the LBIST on the unmasked scan chain to determine if a first latch in the unmasked chain fails the LBIST;   first combinational logic means for identifying, if a first latch fails the LBIST, the first latch to isolate a first limiting cone;   a second mask controller for masking out the data from the first latch the second mask controller including a counter, a comparator and a storage device, the counter for keeping a running number of times data is shifted out of the scan chain, the storage device for holding a number representing the location of the first latch in the scan chain and the comparator for comparing the number from the counter to the number in the storage device and for using a data of a known value instead of the data from the first latch when the number from the storage device is equal to the number from the counter;   the processor for running the LBIST again on the unmasked scan chain to determine whether a second latch fails the LBIST; and   second combinational logic means for identifying, if a second latch fails the LBIST, the second latch to isolate a second limiting cone.   
   
   
       9 . The apparatus of  claim 8  wherein the LBIST is used in an AC fault detection test. 
   
   
       10 - 12 . (canceled) 
   
   
       13 . The apparatus of  claim 8  wherein the second mask controller masks out the data from the second latch to allow the processor to run the LBIST again on the unmasked scan chain to determine whether a third latch fails the LBIST, and the second combinational logic for identifying, if a third latch fails the test, the third latch to isolate a third limiting cone. 
   
   
       14 . A system for isolating a plurality of limiting logical cones in a chip during a logical built-in self test (LBIST), the chip having a plurality of latches for holding data for a plurality of logical cones, the latches being arranged in a plurality of scan chains, the system comprising means for enabling a user to:
 run the LBIST on one scan chain to determine if a first latch fails the LBIST;   identify, if a first latch fails the LBIST, the first latch to isolate a first limiting cone;   mask out the data from the first latch by using a counter, a comparator and a storage device, the counter for keeping a running number of times data is shifted out of the scan chain, the storage device for holding a number representing the location of the first latch in the scan chain and the comparator for comparing the number from the counter to the number in the storage device and using a data of a known value instead of the data from the first latch when the number from the storage device is equal to the number from the counter;   run the LBIST again on the one scan chain to determine if a second latch fails the LBIST; and   identify, if a second latch fails the LBIST, the second latch to isolate a second limiting cone.   
   
   
       15 . The system of  claim 14  wherein the LBIST is used in an AC fault detection test. 
   
   
       16 - 18 . (canceled) 
   
   
       19 . The system of  claim 14  further including means for allowing a user to:
 mask out the data from the second latch;   run the LBIST once more on the one scan chain to determine whether a third latch fails the LBIST; and identify, if a third latch fails the test, the third latch to isolate a third limiting cone.   
   
   
       20 . The system of  claim 14  wherein the system includes a client computer, a server, a notebook computer or a hand-held computer.