Structure and method for creating reliable deep via connections in a silicon carrier
Abstract
A process and structure for enabling the creation of reliable electrical through-via connections in a semiconductor substrate and a process for filling vias. Problems associated with under etch, over etch and flaring of deep Si RIE etched through-vias are mitigated, thereby vastly improving the integrity of the insulation and metallization layers used to convert the through-vias into highly conductive pathways across the Si wafer thickness. By using an insulating collar structure in the substrate in one case and by filling the via in accordance with the invention in another case, whole wafer yield of electrically conductive through vias is greatly enhanced.
Claims
exact text as granted — not AI-modified1 . An insulated through via structure formed in a substrate, comprising:
an insulated pad region perforated with metal contacts formed in said substrate; an annular structure formed in said substrate so as to surround the insulated pad region, said annular structure formed to a depth into the substrate which is greater than that of a plane defined by the insulated pad region; a backside through-via centered on, and contained entirely within, lateral dimensions of the annular structure, and opened to expose a front side metal contact; and an insulating layer completely covering side walls of the through-via, but not covering the metal contacts formed in said substrate.
2 . The structure as recited in claim 1 , wherein the insulating pad is formed of a material selected from the group consisting of silicon dioxide, silicon nitride and a polyimide.
3 . The structure as recited in claim 1 , wherein the material filling the annular structure is selected from the group consisting of silicon dioxide, silicon nitride or polyimide.
4 . The structure as recited in claim 1 , wherein the annular structure is integral with the insulated pad region.
5 . The structure as recited in claim 1 , where the via side wall insulation is formed of silicon dioxide or silicon nitride.
6 . The structure as recited in claim 1 , where the contacts perforating the front side pad extend beyond a plane of the insulated pad region.
7 . The structure as recited in claim 1 , further comprising an inner layer of metal deposited into the through-via such that it is in contact with the insulating side walls as well as said contacts, at the base of the via.
8 . The structure as recited in claim 7 , where the metal is selected from the group consisting of Ti, Ta, W, TiW, Cr, Mo, Ni, Al or Cu.
9 . A method for forming an insulated through via structure in a substrate, comprising:
forming an insulated pad region perforated with at least one metal contact on said substrate; forming an annular structure in said substrate so as to surround said insulated pad region, said annular structure formed to a depth into the substrate which is greater than that of a plane defined by the insulated pad region; forming a backside through-via centered on, and contained entirely within, lateral dimensions of the annular structure, so as to expose said at least one metal contact; and forming an insulating layer completely covering side walls of the through-via, but not covering the metal contacts formed in said substrate.
10 . A method for coating deep vias in a substrate, comprising:
forming a mask on said substrate, said mask having opening therein aligned with respective ones of said vias, said openings having diameters smaller than that of said respective vias; and depositing material to coat said vias through said openings in said mask.
11 . The method as recited in claim 10 , wherein said depositing is performed by sputtering.
12 . The method as recited in claim 10 , wherein said depositing is performed with a plasma jet.
13 . The method as recited in claim 10 , wherein the depositing is performed during relative motion of a source and the substrate so as to provide a conductor thickness at the via bottom sufficient to compensate for via depth variance across the substrate.
14 . The method as recited in claim 13 , wherein the substrate is stationary and the source rotates in a spiral fashion at a predetermined programmed speed between edge and center of the substrate.
15 . The method as recited in claim 13 , wherein both the source and the substrate move relative to each other so as to controlled conductor thickness, by combining rotation and linear movements.
16 . The method as recited in claim 10 , wherein the mask is formed of a removable material, further comprising removing the mask.
17 . The method as recited in claim 10 , wherein a conductor is deposited on a side wall of the via, further comprising adjusting via side wall slope so that bottom thickness of deposited conductor is increased without increasing side wall conductor thickness.
18 . An insulating substrate for making electrical connections, comprising:
a plurality of blind vias extending from a first surface toward a second surface of said substrate, said vias having varying heights, an electrically conductive coating lining said vias, respective coatings of said vias having different thicknesses at bottoms of respective vias; an electrically conductive porous material inside a space defined by said coatings; thicknesses of said coatings at said bottom of said vias being sufficient so that when material is removed from said second surface to expose all of said coatings, said electrically conductive porous material is not exposed.
19 . The substrate as recited in claim 18 , wherein said vias are substantially un-tapered.
20 . The substrate as recited in claim 18 , wherein side wall slope of the vias is varied as a function of via depth so as to control both top and bottom diameters of the via.Join the waitlist — get patent alerts
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