Method for fabricating AIGaN/GaN-HEMT using selective regrowth
Abstract
A semiconductor body includes, on a substrate, a stack of buffer layer, UID-GaN layer overlying the buffer layer, and UID-AlGaN layer overlying the UID-GaN layer. On the surface of the UID-AlGaN layer, an insulation film is deposited and patterned. An n + -GaN layer is selectively regrown directly on a region of the surface of the semiconductor body other than the insulation film using the patterned insulation film as a mask without etching the surface of the semiconductor body. A portion of the selectively regrown n + -GaN layer corresponding to a region reserved for an ohmic contact electrode is defined and the ohmic contact electrode is formed on the region. An opening exposing a region reserved for a gate electrode is defined and formed within the insulation SiO 2 layer, and a gate electrode is formed in the region. An AlGaN/GaN-HEMT or MIS type of AlGaN/GaN-HEMT has lower contact resistance and uniform device characteristics.
Claims
exact text as granted — not AI-modified1 . A method for fabricating an AlGaN/GaN-HEMT (High-Electron Mobility Transistor), comprising the steps of:
preparing a semiconductor body including a substrate, and a stack of a buffer layer formed on the substrate, a UID-GaN layer overlying the buffer layer and a UID-AlGaN layer overlying the UID-GaN layer; forming a pattern of insulation film on a first principal surface provided by a surface of the UID-AlGaN layer; using the pattern of insulation film as a mask to regrow selectively an n + -GaN layer directly on a portion of a surface of the semiconductor body other than an area covered by the insulation film without etching the surface of the semiconductor body; defining, on the selectively regrown n+-GaN layer, a region reserved for an ohmic contact electrode to be formed, and forming the ohmic contact electrode on the region; and forming, within a region defining the patterned insulation film, an opening exposing a region reserved for a gate electrode to be formed, and forming the gate electrode on the region.
2 . The method in accordance with claim 1 , wherein the insulation film is formed as a single film made of any one of SiO 2 , SiN x , SiO x N y , Al 2 O 3 and AlN, where x and y are a composition ratio.
3 . The method in accordance with claim 1 , wherein the insulation film is formed as a stack of two or more films of a material selected from SiO 2 , SiN x , SiO x N y , Al 2 O 3 and AlN, where x and y are a composition ratio.
4 . The method in accordance with claim 1 , wherein the insulation film is formed between the gate electrode and the semiconductor body.Join the waitlist — get patent alerts
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