Method of uniform current distribution using current modified layer

Abstract

An electric device has a p-n diode, where the p-n diode is covered with a current modified layer (CML). With a resistance distribution of the CML, a current is decreased toward all directions from a point on a bonding pad between the CML and the p-n diode. Hence, a current is uniformly distributed on the CML by fine tuning the resistance distribution. Thus, an effectiveness of the electric device is improved.

1 . A method of a uniform current distribution using a current modified layer, comprising steps of:
 (a) obtaining a semiconductor with a p-n junction; and   (b) deposing a resistance-varied transparent conducting layer on said semiconductor with said p-n junction to spread current.   
   
   
       2 . The method according to  claim 1 ,
 wherein said method is applied to an electric device; and   wherein said electric device is selected from a group consisting of a light emitting display (LED), a solar cell, an organic LED (OLED), a liquid crystal display (LCD) and a touch panel.   
   
   
       3 . The method according to  claim 1 ,
 wherein said semiconductor with said p-n junction has a structure selected from a group consisting of an n-side up structure and a p-side up structure.   
   
   
       4 . The method according to  claim 1 ,
 wherein said semiconductor with said p-n junction has a structure selected from a group consisting of a structure of pairs of multiple-quantum-well (MQW) and a structure of layers of heterostructures and p-type-intrinsic-n-type (p-i-n) optical detector structures.   
   
   
       5 . The method according to  claim 1 ,
 wherein said semiconductor with said p-n junction is made of at least one III-V material; and   wherein said III-V material is selected from a group consisting of GaAs, In P, GaN, AlGaN, AlN, GaInN, AlGaInN, InN, GaInAsN and GaInPN   
   
   
       6 . The method according to  claim 1 ,
 wherein said semiconductor with said p-n junction is made of a silicon selected from a group consisting of a monocrystalline silicon, a multicrystalline silicon and an amorphous silicon.   
   
   
       7 . The method according to  claim 1 ,
 wherein said resistance-varied transparent conducting layer is flat and is transparent.   
   
   
       8 . The method according to  claim 1 ,
 wherein said resistance-varied transparent conducting layer is selected from a group consisting of a p-type semiconductor, an n-type semiconductor and an insulator.   
   
   
       9 . The method according to  claim 1 ,
 wherein said resistance-varied transparent conducting layer is made of a metal oxide.   
   
   
       10 . The method according to  claim 1 ,
 wherein said resistance-varied transparent conducting layer is transparent to visible light, infrared and ultraviolet.   
   
   
       11 . The method according to  claim 1 ,
 wherein said resistance-varied transparent conducting layer is adhered to said semiconductor with said p-n junction in a way selected from a group consisting of above a p-type semiconductor of said semiconductor with a p-n junction, beneath said p-type semiconductor of said semiconductor with a p-n junction, above an n-type semiconductor of said semiconductor with a p-n junction, and beneath said n-type semiconductor of said semiconductor with a p-n junction,   
   
   
       12 . The method a according to  claim 1 ,
 wherein said resistance-varied transparent conducting layer on said semiconductor with said p-n junction has an overall thickness selected from a group consisting of a uniform overall thickness or a non-uniform overall thickness.   
   
   
       13 . The method according to  claim 1 ,
 wherein said resistance-varied transparent conducting layer with said uniform overall thickness has a resistance being varied in a horizontal direction; and   wherein a variable resistance coefficient of said resistance-varied transparent conducting layer has a correlation to a position on said resistance-varied transparent conducting layer related to a point on a bonding pad between said resistance-varied transparent conducting layer and said semiconductor with said p-n junction.   
   
   
       14 . The method according to  claim 13 ,
 wherein said variable resistance coefficient is obtained from a function; and   wherein said function includes a discontinuous function.   
   
   
       15 . The method according to  claim 12 ,
 wherein said resistance-varied transparent conducting layer with said non-uniform overall thickness varies resistance in a horizontal direction according to a thickness at a position on said resistance-varied transparent conducting layer; and   wherein a variable resistance coefficient and said thickness at said position on said resistance-varied transparent conducting layer have correlations to said position on said resistance-varied transparent conducting layer related to a point on a bonding pad between said resistance-varied transparent conducting layer and said semiconductor with said p-n junction.   
   
   
       16 . The method according to  claim 15 ,
 wherein said thickness at said position on said resistance-varied transparent conducting layer, and said variable resistance coefficient are obtained from functions; and   wherein said functions include a discontinuous function.   
   
   
       17 . The method according to  claim 1 ,
 wherein said resistance-varied transparent conducting layer further comprises a layer selected from a group consisting of a metal layer and a resistance layer; and   wherein said layer has a non-uniform density.   
   
   
       18 . The method according to  claim 17 ,
 wherein said metal layer is selected from a group consisting of a p-type semiconductor and an n-type semiconductor.   
   
   
       19 . The method according to  claim 17 ,
 wherein said resistance layer is selected from a group consisting of a p-type semiconductor, an n-type semiconductor and a nonconductor.   
   
   
       20 . The method according to  claim 1 ,
 wherein said resistance-varied transparent conducting layer is further roughened on surface.