US2008174018A1PendingUtilityA1

Semiconductor device and method for fabricating the same

Assignee: MATSUSHITA ELECTRIC INDUSTRIAL CO LTDPriority: Sep 9, 2003Filed: Aug 13, 2007Published: Jul 24, 2008
Est. expirySep 9, 2023(expired)· nominal 20-yr term from priority
Inventors:Tetsuya Ueda
H10W 20/47H10W 20/435H10W 20/425H10W 20/089H10W 20/077H10W 20/075H10W 20/071H10W 20/064H10W 20/056H10W 20/054H10W 20/033
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Claims

Abstract

An inventive semiconductor device includes: a lower interlayer dielectric film provided on a substrate; a lower interconnect made up of a lower barrier metal layer formed along a wall surface of a lower interconnect groove in the lower interlayer dielectric film, and a copper film; and an upper plug and an upper interconnect. The upper plug passes through a silicon nitride film and comes into contact with the copper film of the lower interconnect. The lower interconnect is provided with a large number of convex portions buried in concave portions of the lower interconnect groove. Thus, voids in the lower interconnect are also gettered by the convex portions. Accordingly, the concentration of voids in the contact area between the lower interconnect and the upper plug is relieved, and an increase in contact resistance is suppressed.

Claims

exact text as granted — not AI-modified
1 - 17 . (canceled) 
   
   
       18 . A semiconductor device comprising:
 a substrate provided with a semiconductor element;   an interlayer dielectric film provided on the substrate;   an interconnect groove provided in the interlayer dielectric film; and   an interconnect provided within the interconnect groove and having convex or concave portions at least at one of its side surfaces and bottom surface.   
   
   
       19 . The semiconductor device according to  claim 18 ,
 wherein the interconnect groove is provided at its bottom surface with concave or convex portions, and   wherein the convex or concave portions of the interconnect have shapes corresponding to those of the concave or convex portions of the interconnect groove.   
   
   
       20 . The semiconductor device according to  claim 18 ,
 wherein the interconnect groove is provided at its side surfaces with concave or convex portions, and   wherein the convex or concave portions of the interconnect have shapes corresponding to those of the concave or convex portions of the interconnect groove.   
   
   
       21 . The semiconductor device according to  claim 18 ,
 wherein the interconnect groove is provided at its wall surface with concave and convex portions having irregular shapes, and   wherein the convex portions of the interconnect have shapes corresponding to those of the concave portions in the concave and convex portions of the interconnect groove.   
   
   
       22 . The semiconductor device according to  claim 18 ,
 wherein the interconnect includes a portion formed by a copper film.   
   
   
       23 . The semiconductor device according to  claim 18 ,
 wherein the interconnect comprises:   a barrier metal layer formed along side surfaces and a bottom surface of the interconnect groove; and   a first copper film formed in the interconnect groove via the barrier metal layer.   
   
   
       24 . The semiconductor device according to  claim 19 ,
 wherein the interconnect comprises:   a barrier metal layer formed along side surfaces and a bottom surface of the interconnect groove; and   a copper film formed in the interconnect groove via the barrier metal layer.   
   
   
       25 . The semiconductor device according to  claim 18 ,
 wherein at a bottom surface of the interconnect, a lower interconnect and/or a plug that reaches the substrate are/is provided.   
   
   
       26 . The semiconductor device according to  claim 19 ,
 wherein at a bottom surface of the interconnect, a lower interconnect and/or a plug that reaches the substrate are/is provided.   
   
   
       27 . The semiconductor device according to  claim 23 ,
 wherein at a bottom surface of the interconnect, a lower interconnect and/or a plug that reaches the substrate are/is provided.   
   
   
       28 . The semiconductor device according to  claim 24 ,
 wherein at a bottom surface of the interconnect, a lower interconnect and/or a plug that reaches the substrate are/is provided.

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